From c6f6be0929ccef4c551f9640300972e7bc8600ec Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Tue, 12 Nov 2013 22:32:08 +0100 Subject: Support for nehalem northbridge Including raminit Change-Id: If1dd3855181481b8b928adf0fdb40b29d15897db Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/4044 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/cpu/x86/smm/smmhandler_tseg.S | 3 +++ src/cpu/x86/smm/smmrelocate.S | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src/cpu/x86/smm') diff --git a/src/cpu/x86/smm/smmhandler_tseg.S b/src/cpu/x86/smm/smmhandler_tseg.S index eb5d63ca8f..fdc50536de 100644 --- a/src/cpu/x86/smm/smmhandler_tseg.S +++ b/src/cpu/x86/smm/smmhandler_tseg.S @@ -60,6 +60,9 @@ #if CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE || CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE #include #define TSEG_BAR (DEFAULT_PCIEXBAR | TSEG) +#elif CONFIG_NORTHBRIDGE_INTEL_NEHALEM +#include +#define TSEG_BAR (DEFAULT_PCIEXBAR | TSEG) #elif CONFIG_NORTHBRIDGE_INTEL_HASWELL #include #define TSEG_BAR (DEFAULT_PCIEXBAR | TSEG) diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S index d8c4e05766..a0a5d1884f 100644 --- a/src/cpu/x86/smm/smmrelocate.S +++ b/src/cpu/x86/smm/smmrelocate.S @@ -48,6 +48,9 @@ #if CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE || CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE #include #define TSEG_BAR (DEFAULT_PCIEXBAR | TSEG) +#elif CONFIG_NORTHBRIDGE_INTEL_NEHALEM +#include +#define TSEG_BAR (DEFAULT_PCIEXBAR | TSEG) #else #error "Northbridge must define TSEG_BAR." #endif -- cgit v1.2.3