From 62f1ad98c42f18308cda9351a427bb7af8d7dbca Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 24 Jul 2012 14:53:15 -0700 Subject: SMM: Fix state table for Intel Core2 CPUs When fixing the SMM state table for SandyBridge/IvyBridge CPUs the wrong table was used for older 64bit capable CPUs. Change-Id: Ia7dff21aa3f0e5aa61575634fc839777de6bef10 Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/1353 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/cpu/x86/smm/smihandler.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cpu/x86/smm') diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 83ebaf9100..10f38f9690 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -158,6 +158,7 @@ void smi_handler(u32 smm_revision) state_save.type = EM64T; state_save.em64t_state_save = (em64t_smm_state_save_area_t *) (smm_base + 0x7d00 - (node * 0x400)); + break; case 0x00030101: /* SandyBridge/IvyBridge */ state_save.type = EM64T101; state_save.em64t101_state_save = -- cgit v1.2.3