From c5917079eb81b10c58cd3e7bfe6b3925baaf9241 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 15 Mar 2017 16:38:51 -0700 Subject: cpu/x86: Wrap lines at 80 columns Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters TEST=Build and run on Galileo Gen2 Change-Id: I56ea28826963403dc0719f40c13782c56dc97feb Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/18844 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/cpu/x86/lapic/apic_timer.c | 3 ++- src/cpu/x86/lapic/lapic_cpu_init.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 5 deletions(-) (limited to 'src/cpu/x86/lapic') diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c index 829f51f2d9..cddc5ad575 100644 --- a/src/cpu/x86/lapic/apic_timer.c +++ b/src/cpu/x86/lapic/apic_timer.c @@ -127,7 +127,8 @@ void udelay(u32 usecs) timer_fsb = get_timer_fsb(); } - /* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz */ + /* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz + */ ticks = usecs * timer_fsb; start = lapic_read(LAPIC_TMCCT); do { diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 69710a29da..262c6d4fb5 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -5,7 +5,8 @@ * Copyright (C) 2001 Ronald G. Minnich * Copyright (C) 2005 Yinghai Lu * Copyright (C) 2008 coresystems GmbH - * Copyright (C) 2015 Timothy Pearson , Raptor Engineering + * Copyright (C) 2015 Timothy Pearson , + * Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -74,7 +75,8 @@ static void copy_secondary_start_to_lowest_1M(void) /* Fill in secondary_start's local gdt. */ setup_secondary_gdt(); - code_size = (unsigned long)_secondary_start_end - (unsigned long)_secondary_start; + code_size = (unsigned long)_secondary_start_end + - (unsigned long)_secondary_start; if (acpi_is_wakeup_s3()) { /* need to save it for RAM resume */ @@ -89,7 +91,8 @@ static void copy_secondary_start_to_lowest_1M(void) } /* copy the _secondary_start to the RAM below 1M*/ - memcpy((unsigned char *)AP_SIPI_VECTOR, (unsigned char *)_secondary_start, code_size); + memcpy((unsigned char *)AP_SIPI_VECTOR, + (unsigned char *)_secondary_start, code_size); printk(BIOS_DEBUG, "start_eip=0x%08lx, code_size=0x%08lx\n", (long unsigned int)AP_SIPI_VECTOR, code_size); @@ -145,7 +148,8 @@ static int lapic_start_cpu(unsigned long apicid) } return 0; } -#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX && !CONFIG_CPU_INTEL_MODEL_2065X +#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX \ + && !CONFIG_CPU_INTEL_MODEL_2065X mdelay(10); #endif -- cgit v1.2.3