From 5a157176dd8787aed39a8d14691ba536bee08dcf Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Mon, 1 Jul 2019 10:12:45 +0300
Subject: cpu/x86/lapic: Refactor timer_fsb()
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Common apic_timer code in cpu/x86 should not depend on
intel header files.

Change-Id: Ib099921d4b8e561daea47219385762bb00fc4548
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34091
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/cpu/x86/lapic/apic_timer.c | 39 ---------------------------------------
 1 file changed, 39 deletions(-)

(limited to 'src/cpu/x86/lapic')

diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c
index 83521b7230..58836b5e3f 100644
--- a/src/cpu/x86/lapic/apic_timer.c
+++ b/src/cpu/x86/lapic/apic_timer.c
@@ -17,44 +17,8 @@
 #include <thread.h>
 #include <arch/cpu.h>
 #include <arch/early_variables.h>
-#include <cpu/intel/fsb.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
-#include <cpu/intel/speedstep.h>
-
-/* NOTE: This code uses global variables, so it can not be used during
- * memory init.
- */
-
-#if CONFIG_UDELAY_LAPIC_FIXED_FSB != 0
-static inline u32 get_timer_fsb(void)
-{
-	return CONFIG_UDELAY_LAPIC_FIXED_FSB;
-}
-
-static int set_timer_fsb(void)
-{
-	return 0;
-}
-#else
-static u32 g_timer_fsb CAR_GLOBAL;
-
-static int set_timer_fsb(void)
-{
-	int ia32_fsb = get_ia32_fsb();
-
-	if (ia32_fsb > 0) {
-		car_set_var(g_timer_fsb, ia32_fsb);
-		return 0;
-	}
-	return -1;
-}
-
-static inline u32 get_timer_fsb(void)
-{
-	return car_get_var(g_timer_fsb);
-}
-#endif
 
 void init_timer(void)
 {
@@ -66,9 +30,6 @@ void init_timer(void)
 
 	/* Set the initial counter to 0xffffffff */
 	lapic_write(LAPIC_TMICT, 0xffffffff);
-
-	/* Set FSB frequency to a reasonable value */
-	set_timer_fsb();
 }
 
 void udelay(u32 usecs)
-- 
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