From c34713d33e088095acb6dd61527a26117d9c368e Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 25 Feb 2014 20:36:56 -0600 Subject: x86: add MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING option MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Boot speeds can be sped up by mirroring the payload into main memory before doing the actual loading. Systems that would benefit from this are typically Intel ones whose SPI are memory mapped. Without the SPI being cached all accesses to the payload in SPI while being loaded result in uncacheable accesses. Instead take advantage of the on-board SPI controller which has an internal cache and prefetcher by copying 64-byte cachelines using 32-bit word copies. Change-Id: I4aac856b1b5130fa2d68a6c45a96cfeead472a52 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/5305 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Vladimir Serbinenko Reviewed-by: Kyösti Mälkki --- src/cpu/x86/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cpu/x86/Makefile.inc') diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index d5bc2fd219..277ba484a6 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -3,6 +3,7 @@ romstage-$(CONFIG_HAVE_ACPI_RESUME) += car.c subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c +ramstage-$(CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING) += mirror_payload.c SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf SIPI_BIN=$(SIPI_ELF:.elf=) -- cgit v1.2.3