From 44ef38f70344f44ee53a3883515246172eb75054 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 25 May 2020 08:52:07 +0300 Subject: arch/x86: Remove NO_FIXED_XIP_ROM_SIZE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The variable SETUP_XIP_CACHE provides us a working alternative. Change-Id: I6e3befedbbc7967b71409640dc81a0c2a9b3e511 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/41821 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/x86/Kconfig | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'src/cpu/x86/Kconfig') diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 07dfe45e64..5394cd023d 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -60,16 +60,6 @@ config TSC_SYNC_MFENCE to execute an mfence instruction in order to synchronize rdtsc. This is true for all modern Intel CPUs. -config NO_FIXED_XIP_ROM_SIZE - bool - default n - help - The XIP_ROM_SIZE Kconfig variable is used globally on x86 - with the assumption that all chipsets utilize this value. - For the chipsets which do not use the variable it can lead - to unnecessary alignment constraints in cbfs for romstage. - Therefore, allow those chipsets a path to not be burdened. - config SETUP_XIP_CACHE bool depends on !NO_XIP_EARLY_STAGES -- cgit v1.2.3