From 4337020b950454815204eed4e43a894be0b125ca Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Wed, 5 Feb 2014 19:46:45 +0100 Subject: Remove CACHE_ROM. With the recent improvement 3d6ffe76f8a505c2dff5d5c6146da3d63dad6e82, speedup by CACHE_ROM is reduced a lot. On the other hand this makes coreboot run out of MTRRs depending on system configuration, hence screwing up I/O access and cache coherency in worst cases. CACHE_ROM requires the user to sanity check their boot output because the feature is brittle. The working configuration is dependent on I/O hole size, ram size, and chipset. Because of this the current implementation can leave a system configured in an inconsistent state leading to unexpected results such as poor performance and/or inconsistent cache-coherency Remove this as a buggy feature until we figure out how to do it properly if necessary. Change-Id: I858d78a907bf042fcc21fdf7a2bf899e9f6b591d Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/5146 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/x86/Kconfig | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/cpu/x86/Kconfig') diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 98238d8f06..19fa246fe2 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -76,13 +76,6 @@ config LOGICAL_CPUS bool default y -config CACHE_ROM - bool "Allow for caching system ROM." - default n - help - When selected a variable range MTRR is allocated for coreboot and - the bootloader enables caching of the system ROM for faster access. - config SMM_TSEG bool default n -- cgit v1.2.3