From de37be8a1afd3ce676142bf75b975cc6e4f26dcd Mon Sep 17 00:00:00 2001
From: Bora Guvendik <bora.guvendik@intel.com>
Date: Mon, 18 Mar 2024 13:38:28 -0700
Subject: cpu/x86: Use correct config flag for 1GiB page table
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The commit below uses USE_1G_PAGETABLES config flag instead of
the correct USE_1G_PAGES_TLB.
"commit ecbc243a45de3b7894e2fe6c8e22b5d07172274b
("cpu/x86: Add 1GiB pages for memory access up to 512GiB")"

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Ic19812bc1f90cbe7d3739c42a0314b3650e0501d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
---
 src/cpu/x86/64bit/Makefile.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/cpu/x86/64bit')

diff --git a/src/cpu/x86/64bit/Makefile.mk b/src/cpu/x86/64bit/Makefile.mk
index 680ab2d42a..a8dc1a286a 100644
--- a/src/cpu/x86/64bit/Makefile.mk
+++ b/src/cpu/x86/64bit/Makefile.mk
@@ -3,7 +3,7 @@
 all_x86-y += mode_switch.S
 all_x86-y += mode_switch2.S
 
-ifeq ($(CONFIG_USE_1G_PAGETABLES),y)
+ifeq ($(CONFIG_USE_1G_PAGES_TLB),y)
 PAGETABLE_SRC := pt1G.S
 else
 PAGETABLE_SRC := pt.S
-- 
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