From d3c0c0c318d2e2b5a3d6276bb0fdd732170756d3 Mon Sep 17 00:00:00 2001 From: Hannah Williams Date: Fri, 27 Apr 2018 09:09:04 -0700 Subject: arch/x86: Relocate GDT in verstage, romstage, and postcar In each stage keep GDT in the code region. This accommodates platforms, such as glk, that are executing out of CAR. The gdt is small and loading it is trivial so just do it unconditionally instead of introducing another Kconfig. BUG=b:78656686 Change-Id: I01ded6e9b358b23e04d92bef5263bfe8c2a5ec5a Signed-off-by: Hannah Williams Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/25895 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Justin TerAvest --- src/cpu/x86/32bit/entry32.inc | 31 +------------------------------ 1 file changed, 1 insertion(+), 30 deletions(-) (limited to 'src/cpu/x86/32bit/entry32.inc') diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 2caeb40c3f..ae7cc019d9 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -16,38 +16,9 @@ #include #include #include +#include .code32 - - - /* This is the GDT for the ROM stage part of coreboot. It - * is different from the RAM stage GDT which is defined in - * c_start.S - */ - - .align 4 -.globl gdtptr -gdt: -gdtptr: - .word gdt_end - gdt -1 /* compute the table limit */ - .long gdt /* we know the offset */ - .word 0 - - /* selgdt 0x08, flat code segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ - - /* selgdt 0x10,flat data segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x93, 0xcf, 0x00 - - /* selgdt 0x18, flat code segment (64-bit) */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xaf, 0x00 - -gdt_end: - - /* * When we come here we are in protected mode. We expand * the stack and copies the data segment from ROM to the -- cgit v1.2.3