From 439356fabcacbbc3a3231f6e27b5298f8f5ad41f Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 2 Sep 2015 22:23:11 -0500 Subject: x86: remove cpu_incs as romstage Make variable When building up which files to include in romstage there were both 'cpu_incs' and 'cpu_incs-y' which were used to generate crt0.S. Remove the former to settle on cpu_incs-y as the way to be included. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built rambi. No include file changes. Change-Id: I8dc0631f8253c21c670f2f02928225ed5b869ce6 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11494 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/cpu/via/c7/Makefile.inc | 2 +- src/cpu/via/nano/Makefile.inc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/via') diff --git a/src/cpu/via/c7/Makefile.inc b/src/cpu/via/c7/Makefile.inc index 417d762751..8c13d91a92 100644 --- a/src/cpu/via/c7/Makefile.inc +++ b/src/cpu/via/c7/Makefile.inc @@ -7,4 +7,4 @@ subdirs-y += ../../intel/microcode ramstage-y += c7_init.c -cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/via/car/cache_as_ram.inc diff --git a/src/cpu/via/nano/Makefile.inc b/src/cpu/via/nano/Makefile.inc index b5d00ecb4a..d3df3fbcc0 100644 --- a/src/cpu/via/nano/Makefile.inc +++ b/src/cpu/via/nano/Makefile.inc @@ -30,4 +30,4 @@ ramstage-y += update_ucode.c # the rest of coreboot. cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c -cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/via/car/cache_as_ram.inc -- cgit v1.2.3