From 2f726c3e83da564b90f72b97cede8458c148f0ed Mon Sep 17 00:00:00 2001
From: Greg Watson <jarrah@users.sourceforge.net>
Date: Sun, 9 Nov 2003 23:26:56 +0000
Subject: updated for v2

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/cpu/ppc/mpc74xx/mpc74xx.inc | 12 ------------
 1 file changed, 12 deletions(-)

(limited to 'src/cpu/ppc/mpc74xx/mpc74xx.inc')

diff --git a/src/cpu/ppc/mpc74xx/mpc74xx.inc b/src/cpu/ppc/mpc74xx/mpc74xx.inc
index 6d23c3ad7e..5f6cee20dc 100644
--- a/src/cpu/ppc/mpc74xx/mpc74xx.inc
+++ b/src/cpu/ppc/mpc74xx/mpc74xx.inc
@@ -89,13 +89,6 @@
 	mtsr    15, r0
 	isync
 
-	/*
-	 * Initialize northbridge. This has to happen early because it
-	 * resets memory. Memory is on at this point, albeit with
-	 * pessimistic settings. We reconfigure later using I2C.
-	 */
-	bl	bsp_init_northbridge
-
         /*
 	 * Set up DBATs 
 	 *
@@ -183,8 +176,3 @@ tlblp:
         ori     r2, r2, HID0_ICE | HID0_ICFI
 	isync
         mtspr   HID0, r2
-
-	/*
-	 * Must branch to start_payload once CPU initialization is completed
-	 */
-	b	start_payload
-- 
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