From 83b991afff40e12a8b6756af06a472842edb1a66 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Sat, 11 Oct 2003 06:20:25 +0000 Subject: - O2, enums, and switch statements work in romcc - Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/p6/mtrr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/p6') diff --git a/src/cpu/p6/mtrr.c b/src/cpu/p6/mtrr.c index b067883316..1225fafe08 100644 --- a/src/cpu/p6/mtrr.c +++ b/src/cpu/p6/mtrr.c @@ -92,7 +92,7 @@ static void intel_set_var_mtrr(unsigned int reg, unsigned long basek, unsigned l base.lo = basek << 10; if (sizek < 4*1024*1024) { - mask.hi = 0x0F; + mask.hi = 0x0FF; mask.lo = ~((sizek << 10) -1); } else { -- cgit v1.2.3