From dc4a8d026058b7c4ff5193c81bd90fe0b3fd2271 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 7 Jul 2020 21:52:44 +0200 Subject: cpu/intel/model_2065x/model_2065x_init.c: Drop dead code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This code is not even being build-tested. Drop it before it grows moss. Change-Id: I16fe12368ce7ffe2fd4d2a5580dd92c19a695848 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43208 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/cpu/intel/model_2065x/model_2065x_init.c | 26 -------------------------- 1 file changed, 26 deletions(-) (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 6f41ac5c72..3208e10849 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -147,13 +147,6 @@ static void configure_misc(void) msr.lo = 0; msr.hi = 0; wrmsr(IA32_THERM_INTERRUPT, msr); - -#ifdef DISABLED - /* Enable package critical interrupt only */ - msr.lo = 1 << 4; - msr.hi = 0; - wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr); -#endif } static void enable_lapic_tpr(void) @@ -188,22 +181,6 @@ static void set_max_ratio(void) ((perf_ctl.lo >> 8) & 0xff) * IRONLAKE_BCLK); } -static void set_energy_perf_bias(u8 policy) -{ -#ifdef DISABLED - msr_t msr; - - /* Energy Policy is bits 3:0 */ - msr = rdmsr(IA32_ENERGY_PERF_BIAS); - msr.lo &= ~0xf; - msr.lo |= policy & 0xf; - wrmsr(IA32_ENERGY_PERF_BIAS, msr); - - printk(BIOS_DEBUG, "model_x06ax: energy policy set to %u\n", - policy); -#endif -} - static void configure_mca(void) { msr_t msr; @@ -247,9 +224,6 @@ static void model_2065x_init(struct device *cpu) /* Thermal throttle activation offset */ configure_thermal_target(); - /* Set energy policy */ - set_energy_perf_bias(ENERGY_POLICY_NORMAL); - /* Set Max Ratio */ set_max_ratio(); -- cgit v1.2.3