From b4f827d45a08d849df9d15abd644e3a98a6f1932 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 21 Jun 2016 06:59:30 +0300 Subject: intel cache-as-ram: Fix comment about MTRRs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I5b9e10fe119c1a046494235e85f730bedfe8578d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/15282 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/intel/car/cache_as_ram.inc | 4 ++-- src/cpu/intel/car/cache_as_ram_ht.inc | 4 ++-- src/cpu/intel/model_6ex/cache_as_ram.inc | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index 349ec05f03..3d7be8bf5e 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -321,8 +321,8 @@ lout: call romstage_main /* Save return value from romstage_main. It contains the stack to use - * after cache-as-ram is torn down. It also contains the information - * for setting up MTRRs. */ + * after cache-as-ram is torn down. + */ movl %eax, %ebx /* We don't need CAR from now on. */ diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index f5256adb76..1e21d9dc6d 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -342,8 +342,8 @@ no_msr_11e: call romstage_main /* Save return value from romstage_main. It contains the stack to use - * after cache-as-ram is torn down. It also contains the information - * for setting up MTRRs. */ + * after cache-as-ram is torn down. + */ movl %eax, %ebx post_code(0x30) diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc index f4c4af86d3..79383e163f 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram.inc +++ b/src/cpu/intel/model_6ex/cache_as_ram.inc @@ -135,8 +135,8 @@ clear_mtrrs: call romstage_main /* Save return value from romstage_main. It contains the stack to use - * after cache-as-ram is torn down. It also contains the information - * for setting up MTRRs. */ + * after cache-as-ram is torn down. + */ movl %eax, %ebx post_code(0x2f) -- cgit v1.2.3