From 24813c1490b016a10d91acbb9cc26c5b030f7314 Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Thu, 16 Oct 2014 10:39:06 +0200 Subject: i945: Consolidate acpi/platform.asl Change-Id: Iccb2dda8a427e483c04693e46b00e0bc2452a26b Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/7086 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/cpu/intel/model_6dx/acpi/cpu.asl | 37 ++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 src/cpu/intel/model_6dx/acpi/cpu.asl (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/model_6dx/acpi/cpu.asl b/src/cpu/intel/model_6dx/acpi/cpu.asl new file mode 100644 index 0000000000..8928c3823f --- /dev/null +++ b/src/cpu/intel/model_6dx/acpi/cpu.asl @@ -0,0 +1,37 @@ +/* These come from the dynamically created CPU SSDT */ +External(PDC0) +External(PDC1) + +// Power notification + +External (\_PR_.CPU0, DeviceObj) +External (\_PR_.CPU1, DeviceObj) +External (\_PR_.CPU0._PPC) +External (\_PR_.CPU1._PPC) + +Method (PNOT) +{ + If (MPEN) { + If(And(PDC0, 0x08)) { + Notify (\_PR_.CPU0, 0x80) // _PPC + + If (And(PDC0, 0x10)) { + Sleep(100) + Notify(\_PR_.CPU0, 0x81) // _CST + } + } + + If(And(PDC1, 0x08)) { + Notify (\_PR_.CPU1, 0x80) // _PPC + If (And(PDC1, 0x10)) { + Sleep(100) + Notify(\_PR_.CPU1, 0x81) // _CST + } + } + + } Else { // UP + Notify (\_PR_.CPU0, 0x80) + Sleep(0x64) + Notify(\_PR_.CPU0, 0x81) + } +} -- cgit v1.2.3