From 4829af17e3171da803532e9757100cc9f70d70ec Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 27 Feb 2019 14:23:18 +0100 Subject: cpu/intel: Rename socket_mFCPGA478 to socket_m The name was wrong. mFCPGA478 is actually a pseudonym for mPGA478MN, the successor of the socket that was meant. The official name of this socket is mPGA478MT. But "Socket M" is much easier to distinguish. Change-Id: I4efeaca69acddfcdc5e957b0b521544314d46eeb Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/31642 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel --- src/cpu/intel/socket_m/Makefile.inc | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 src/cpu/intel/socket_m/Makefile.inc (limited to 'src/cpu/intel/socket_m/Makefile.inc') diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc new file mode 100644 index 0000000000..139b1bb624 --- /dev/null +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -0,0 +1,17 @@ +subdirs-y += ../model_69x +subdirs-y += ../model_6dx +subdirs-y += ../model_6ex +subdirs-y += ../model_6fx +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../hyperthreading +subdirs-y += ../speedstep + +cpu_incs-y += $(src)/cpu/intel/car/core2/cache_as_ram.S +postcar-y += ../car/p4-netburst/exit_car.S + +romstage-y += ../car/romstage.c -- cgit v1.2.3