From 688d004c4f8d94089c637be3a53ebdbb48493e97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 24 May 2018 18:20:46 +0300 Subject: Remove leftover Intel CPU support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I6ac67137d5f5c63dbc4fc54eacb3e326ccf423d4 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26516 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/cpu/intel/socket_PGA370/Kconfig | 36 -------------------------------- src/cpu/intel/socket_PGA370/Makefile.inc | 26 ----------------------- 2 files changed, 62 deletions(-) delete mode 100644 src/cpu/intel/socket_PGA370/Kconfig delete mode 100644 src/cpu/intel/socket_PGA370/Makefile.inc (limited to 'src/cpu/intel/socket_PGA370') diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig deleted file mode 100644 index b23308ce19..0000000000 --- a/src/cpu/intel/socket_PGA370/Kconfig +++ /dev/null @@ -1,36 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -config CPU_INTEL_SOCKET_PGA370 - bool - select CPU_INTEL_MODEL_6XX - select MMX - -if CPU_INTEL_SOCKET_PGA370 - -# Not all CPUs for Socket 370 can do SSE2 -config SSE2 - bool - default n - -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - -endif diff --git a/src/cpu/intel/socket_PGA370/Makefile.inc b/src/cpu/intel/socket_PGA370/Makefile.inc deleted file mode 100644 index 9265ba458e..0000000000 --- a/src/cpu/intel/socket_PGA370/Makefile.inc +++ /dev/null @@ -1,26 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -subdirs-y += ../model_6xx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode - -cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc -romstage-y += ../car/romstage_legacy.c -- cgit v1.2.3