From 40bffc22cd6b83b186c023d473e6213a65c2d51d Mon Sep 17 00:00:00 2001 From: Joseph Smith Date: Mon, 21 Jun 2010 19:40:09 +0000 Subject: Create new socket for FCPGA370 and PGA370 CPU's for CAR. Add CAR support for Coppermine FC-PGA CPU's (model_68x). Signed-off-by: Joseph Smith Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/intel/socket_FC_PGA370/Kconfig | 25 +++++++++++++++++++ src/cpu/intel/socket_FC_PGA370/Makefile.inc | 30 +++++++++++++++++++++++ src/cpu/intel/socket_FC_PGA370/chip.h | 24 ++++++++++++++++++ src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c | 26 ++++++++++++++++++++ 4 files changed, 105 insertions(+) create mode 100644 src/cpu/intel/socket_FC_PGA370/Kconfig create mode 100644 src/cpu/intel/socket_FC_PGA370/Makefile.inc create mode 100644 src/cpu/intel/socket_FC_PGA370/chip.h create mode 100644 src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c (limited to 'src/cpu/intel/socket_FC_PGA370') diff --git a/src/cpu/intel/socket_FC_PGA370/Kconfig b/src/cpu/intel/socket_FC_PGA370/Kconfig new file mode 100644 index 0000000000..513b4d0585 --- /dev/null +++ b/src/cpu/intel/socket_FC_PGA370/Kconfig @@ -0,0 +1,25 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2010 Joseph Smith +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config CPU_INTEL_SOCKET_FC_PGA370 + bool + select CPU_INTEL_MODEL_68X + select MMX + select SSE diff --git a/src/cpu/intel/socket_FC_PGA370/Makefile.inc b/src/cpu/intel/socket_FC_PGA370/Makefile.inc new file mode 100644 index 0000000000..5a2b63ae92 --- /dev/null +++ b/src/cpu/intel/socket_FC_PGA370/Makefile.inc @@ -0,0 +1,30 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2010 Joseph Smith +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +obj-y += socket_FC_PGA370.o +subdirs-y += ../model_68x +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode + +cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc diff --git a/src/cpu/intel/socket_FC_PGA370/chip.h b/src/cpu/intel/socket_FC_PGA370/chip.h new file mode 100644 index 0000000000..c1195c2fd5 --- /dev/null +++ b/src/cpu/intel/socket_FC_PGA370/chip.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Joseph Smith + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +extern struct chip_operations cpu_intel_socket_FC_PGA370_ops; + +struct cpu_intel_socket_FC_PGA370_config { +}; diff --git a/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c b/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c new file mode 100644 index 0000000000..e3bca8f262 --- /dev/null +++ b/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Joseph Smith + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include "chip.h" + +struct chip_operations cpu_intel_socket_FC_PGA370_ops = { + CHIP_NAME("(FC)PGA370 CPU") +}; -- cgit v1.2.3