From 99e0c7ddc1004b69df65483c029ee8915650223a Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 19 Aug 2020 21:48:59 +0200 Subject: src/cpu: Drop unneeded empty lines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I116b15c83fcc5d69d3f80a2e6cf0fb085064d9a6 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/44604 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/cpu/intel/slot_1/l2_cache.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/cpu/intel/slot_1') diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c index ce3634b667..57d1fd4af0 100644 --- a/src/cpu/intel/slot_1/l2_cache.c +++ b/src/cpu/intel/slot_1/l2_cache.c @@ -189,7 +189,6 @@ int calculate_l2_latency(void) return 0; } - /* Setup address, data_high:data_low into the L2 * control registers and then issue command with correct cache way */ -- cgit v1.2.3