From f8a2dddb573faef41ad43ee111d91d4c5259ad59 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Sat, 30 Oct 2004 08:05:41 +0000 Subject: - To reduce confuse rename the parts of linuxbios bios that run from ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/intel/model_f0x/Config.lb | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/cpu/intel/model_f0x') diff --git a/src/cpu/intel/model_f0x/Config.lb b/src/cpu/intel/model_f0x/Config.lb index 1e6126c3cc..2458c81c14 100644 --- a/src/cpu/intel/model_f0x/Config.lb +++ b/src/cpu/intel/model_f0x/Config.lb @@ -1,3 +1,5 @@ +uses HAVE_MOVNTI +default HAVE_MOVNTI=1 dir /cpu/x86/tsc dir /cpu/x86/mtrr dir /cpu/x86/fpu -- cgit v1.2.3