From 2a27b20226a2fd593bfd5f6a0eee45418233fe04 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sat, 11 Dec 2010 22:14:44 +0000 Subject: factor out cpu power management base into a separate file. And fix a bug in model_1067x Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/intel/model_6fx/model_6fx_init.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'src/cpu/intel/model_6fx') diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 0944aab955..a3939c91f7 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -94,15 +95,6 @@ static void enable_vmx(void) #define PMG_IO_BASE_ADDR 0xe3 #define PMG_IO_CAPTURE_ADDR 0xe4 -/* MWAIT coordination I/O base address. This must match - * the \_PR_.CPU0 PM base address. - */ -#define PMB0_BASE 0x510 - -/* PMB1: I/O port that triggers SMI once cores are in the same state. - * See CSM Trigger, at PMG_CST_CONFIG_CONTROL[6:4] - */ -#define PMB1_BASE 0x800 #define HIGHEST_CLEVEL 3 static void configure_c_states(void) { -- cgit v1.2.3