From d52bfbb6aa822b8d5137bedef638a5214a07e4da Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 7 Nov 2022 09:23:02 +0100 Subject: cpu/intel/sandybridge: Use enum for ACPI C states MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also remove the now unnecessary comments from the devicetree. Change-Id: Iebbe12fd413b7a2eb1078a579e194eba821ada7c Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/69292 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/cpu/intel/model_206ax/chip.h | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'src/cpu/intel/model_206ax') diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index 4fff04a705..a46c7bf154 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -3,10 +3,21 @@ /* Magic value used to locate this chip in the device tree */ #define SPEEDSTEP_APIC_MAGIC 0xACAC +/* Keep this in sync with acpi.c */ +enum cpu_acpi_level { + CPU_ACPI_DISABLED = 0, + CPU_ACPI_C1, + CPU_ACPI_C2, + CPU_ACPI_C3, + CPU_ACPI_C6, + CPU_ACPI_C7, + CPU_ACPI_C7S, +}; + struct cpu_intel_model_206ax_config { - int acpi_c1; /* ACPI C1 */ - int acpi_c2; /* ACPI C2 */ - int acpi_c3; /* ACPI C3 */ + enum cpu_acpi_level acpi_c1; + enum cpu_acpi_level acpi_c2; + enum cpu_acpi_level acpi_c3; int tcc_offset; /* TCC Activation Offset */ }; -- cgit v1.2.3