From 5fbe788bae15f0d24d56011e8eb8b48c107b7b05 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 25 Jan 2018 20:03:42 +0100 Subject: model_206ax: Use parallel MP init This patch adds a few southbridge calls needed for parallel MP init. Moves the smm_relocate() function to smm/gen1/smi.h, since that is where this function is defined now. Tested on Thinkpad X220, shaves of ~30ms on a 2 core, 4 threads CPU. Change-Id: Iacd7bfedfccbc09057e1b7ca3bd03d44a888871d Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/23432 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/cpu/intel/model_206ax/Kconfig | 1 + src/cpu/intel/model_206ax/model_206ax.h | 1 - src/cpu/intel/model_206ax/model_206ax_init.c | 161 +++++++++++++-------------- 3 files changed, 77 insertions(+), 86 deletions(-) (limited to 'src/cpu/intel/model_206ax') diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index b30cfa10c2..cb09d23750 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -23,6 +23,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_MFENCE select CPU_INTEL_COMMON select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select PARALLEL_MP config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 962b8302eb..e5bc39eab4 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -121,7 +121,6 @@ void intel_model_206ax_finalize_smm(void); /* Configure power limits for turbo mode */ void set_power_limits(u8 power_limit_1_time); int cpu_config_tdp_levels(void); -void smm_relocate(void); #endif #endif diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 5c60ed77b5..2b8e55bd77 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -23,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -421,83 +423,6 @@ static void configure_mca(void) wrmsr(IA32_MC0_STATUS + (i * 4), msr); } -int cpu_get_apic_id_map(int *apic_id_map) -{ - struct cpuid_result result; - unsigned int threads_per_package, threads_per_core, i, shift = 0; - - /* Logical processors (threads) per core */ - result = cpuid_ext(0xb, 0); - threads_per_core = result.ebx & 0xffff; - - /* Logical processors (threads) per package */ - result = cpuid_ext(0xb, 1); - threads_per_package = result.ebx & 0xffff; - - if (threads_per_core == 1) - shift++; - - for (i = 0; i < threads_per_package && i < CONFIG_MAX_CPUS; i++) - apic_id_map[i] = i << shift; - - return threads_per_package; -} - -/* - * Initialize any extra cores/threads in this package. - */ -static void intel_cores_init(struct device *cpu) -{ - struct cpuid_result result; - unsigned int threads_per_package, threads_per_core, i; - - /* Logical processors (threads) per core */ - result = cpuid_ext(0xb, 0); - threads_per_core = result.ebx & 0xffff; - - /* Logical processors (threads) per package */ - result = cpuid_ext(0xb, 1); - threads_per_package = result.ebx & 0xffff; - - /* Only initialize extra cores from BSP */ - if (cpu->path.apic.apic_id) - return; - - printk(BIOS_DEBUG, "CPU: %u has %u cores, %u threads per core\n", - cpu->path.apic.apic_id, threads_per_package/threads_per_core, - threads_per_core); - - for (i = 1; i < threads_per_package; ++i) { - struct device_path cpu_path; - struct device *new; - - /* Build the CPU device path */ - cpu_path.type = DEVICE_PATH_APIC; - cpu_path.apic.apic_id = - cpu->path.apic.apic_id + i; - - /* Update APIC ID if no hyperthreading */ - if (threads_per_core == 1) - cpu_path.apic.apic_id <<= 1; - - /* Allocate the new CPU device structure */ - new = alloc_dev(cpu->bus, &cpu_path); - if (!new) - continue; - - printk(BIOS_DEBUG, "CPU: %u has core %u\n", - cpu->path.apic.apic_id, - new->path.apic.apic_id); - - /* Start the new CPU */ - if (is_smp_boot() && !start_cpu(new)) { - /* Record the error in cpu? */ - printk(BIOS_ERR, "CPU %u would not start!\n", - new->path.apic.apic_id); - } - } -} - static void model_206ax_init(struct device *cpu) { char processor_name[49]; @@ -505,8 +430,6 @@ static void model_206ax_init(struct device *cpu) /* Turn on caching if we haven't already */ x86_enable_cache(); - intel_update_microcode_from_cbfs(); - /* Clear out pending MCEs */ configure_mca(); @@ -514,10 +437,6 @@ static void model_206ax_init(struct device *cpu) fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); - /* Setup MTRRs based on physical address size */ - x86_setup_mtrrs_with_detect(); - x86_mtrr_check(); - /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT @@ -548,9 +467,81 @@ static void model_206ax_init(struct device *cpu) /* Enable Turbo */ enable_turbo(); +} + +/* MP initialization support. */ +static const void *microcode_patch; + +static void pre_mp_init(void) +{ + /* Setup MTRRs based on physical address size. */ + x86_setup_mtrrs_with_detect(); + x86_mtrr_check(); +} + +static int get_cpu_count(void) +{ + struct cpuid_result result; + unsigned int threads_per_package, threads_per_core; + + /* Logical processors (threads) per core */ + result = cpuid_ext(0xb, 0); + threads_per_core = result.ebx & 0xffff; + + ASSERT(threads_per_core != 0); + + /* Logical processors (threads) per package */ + result = cpuid_ext(0xb, 1); + threads_per_package = result.ebx & 0xffff; - /* Start up extra cores */ - intel_cores_init(cpu); + printk(BIOS_DEBUG, "CPU has %u cores, %u threads enabled.\n", + threads_per_package / threads_per_core, threads_per_package); + + return threads_per_package; +} + +static void get_microcode_info(const void **microcode, int *parallel) +{ + microcode_patch = intel_microcode_find(); + *microcode = microcode_patch; + *parallel = 1; +} + +static void per_cpu_smm_trigger(void) +{ + /* Relocate the SMM handler. */ + smm_relocate(); + + /* After SMM relocation a 2nd microcode load is required. */ + intel_microcode_load_unlocked(microcode_patch); +} + +static void post_mp_init(void) +{ + /* Now that all APs have been relocated as well as the BSP let SMIs + * start flowing. */ + southbridge_smm_init(); + + /* Lock down the SMRAM space. */ + smm_lock(); +} + + +static const struct mp_ops mp_ops = { + .pre_mp_init = pre_mp_init, + .get_cpu_count = get_cpu_count, + .get_smm_info = smm_info, + .get_microcode_info = get_microcode_info, + .pre_mp_smm_init = smm_initialize, + .per_cpu_smm_trigger = per_cpu_smm_trigger, + .relocation_handler = smm_relocation_handler, + .post_mp_init = post_mp_init, +}; + +void bsp_init_and_start_aps(struct bus *cpu_bus) +{ + if (mp_init_with_smm(cpu_bus, &mp_ops)) + printk(BIOS_ERR, "MP initialization failure.\n"); } static struct device_operations cpu_dev_ops = { -- cgit v1.2.3