From 3fa23b8c008709e4204992c52fcd5b729454b333 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 25 Jan 2021 09:42:08 +0100 Subject: soc/intel/*: Get rid of custom microcode caching Get rid of custom microcode caching in MPinit and SGX code and use the caching introduced in intel_microcode_find() instead. Change-Id: If3ccd4dcff221c88839ffeafa812f4c38cede63f Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/49897 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons --- src/cpu/intel/model_206ax/model_206ax_init.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/cpu/intel/model_206ax') diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 31099fd486..ef04d3981f 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -466,8 +466,6 @@ static void model_206ax_init(struct device *cpu) } /* MP initialization support. */ -static const void *microcode_patch; - static void pre_mp_init(void) { /* Setup MTRRs based on physical address size. */ @@ -492,8 +490,7 @@ static int get_cpu_count(void) static void get_microcode_info(const void **microcode, int *parallel) { - microcode_patch = intel_microcode_find(); - *microcode = microcode_patch; + *microcode = intel_microcode_find(); *parallel = !intel_ht_supported(); } @@ -503,6 +500,7 @@ static void per_cpu_smm_trigger(void) smm_relocate(); /* After SMM relocation a 2nd microcode load is required. */ + const void *microcode_patch = intel_microcode_find(); intel_microcode_load_unlocked(microcode_patch); } -- cgit v1.2.3