From 964d91f7d745ee71b2e7f3ffb90aa8fe7a373704 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 7 Dec 2020 13:11:17 +0100 Subject: nb/intel/sandybridge: Clean up stepping logic Do not combine the host bridge device ID with the CPU stepping because it is confusing. Although Sandy/Ivy Bridge processors incorporate both CPU and northbridge components into the same die, it is best to treat them separately. Plus, this change enables moving CPU stepping macros from northbridge code into the CPU scope, which is done in a follow-up. Change-Id: I27ad609eb53b96987ad5445301b5392055fa4ea1 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/48408 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/cpu/intel/model_206ax/model_206ax.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/cpu/intel/model_206ax/model_206ax.h') diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index eb340adee9..b6e2d65e96 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -3,6 +3,7 @@ #ifndef _CPU_INTEL_MODEL_206AX_H #define _CPU_INTEL_MODEL_206AX_H +#include #include /* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ @@ -88,4 +89,9 @@ void set_power_limits(u8 power_limit_1_time); int cpu_config_tdp_levels(void); int get_platform_id(void); +static inline u8 cpu_stepping(void) +{ + return cpuid_eax(1) & 0xf; +} + #endif -- cgit v1.2.3