From f5a11aa82f66a77a4b79b602604a8516ca187c3b Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Thu, 25 Oct 2012 14:01:37 -0600 Subject: Initialize the VMX MSR The VMX MSR may come up with random values and needs to be initialized to zero. This was done incorrectly in finalize_smm. It must be done on a per core basis in the general CPU init. This touches all Sandybridge and Ivybridge configs. Change-Id: I015352d0f8e2ebe55ac0a5e9c5bbff83bd2ff86b Signed-off-by: Marc Jones Reviewed-on: http://review.coreboot.org/1794 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/cpu/intel/model_206ax/finalize.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/cpu/intel/model_206ax/finalize.c') diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c index ca7048d50b..4ed5d1e5f8 100644 --- a/src/cpu/intel/model_206ax/finalize.c +++ b/src/cpu/intel/model_206ax/finalize.c @@ -43,7 +43,6 @@ static void msr_set_bit(unsigned reg, unsigned bit) void intel_model_206ax_finalize_smm(void) { - msr_set_bit(IA32_FEATURE_CONTROL, 0); msr_set_bit(MSR_PMG_CST_CONFIG_CONTROL, 15); /* Lock AES-NI only if supported */ -- cgit v1.2.3