From c00e2fb9966a9c4bd30944a198ad036ee81a2b0d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 11 Feb 2019 11:36:17 +0200 Subject: cpu/intel: Use CPU_INTEL_COMMON_TIMEBASE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I0e7159039751a88d86b6c343be5f085e6e15570a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31342 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/cpu/intel/model_206ax/Makefile.inc | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/cpu/intel/model_206ax/Makefile.inc') diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index e723d74d78..d19d860304 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -17,11 +17,6 @@ ramstage-y += common.c romstage-y += common.c smm-y += common.c -ramstage-y += tsc_freq.c -romstage-y += tsc_freq.c -postcar-y += tsc_freq.c -smm-y += tsc_freq.c - smm-y += finalize.c cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-2a-*) -- cgit v1.2.3