From af1cbe2278b4ca3252d48ba36814db940e9d4237 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Fri, 25 Oct 2019 21:37:40 +0200 Subject: cpu/x86: make set_msr_bit publicly available MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Haswell and model_2065 implement a static set_msr_bit helper which should be publicly available instead. Move it to cpu/x86. Change-Id: I68b314c917f15fc6e5351de1c539d5a3ae646df8 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36338 Reviewed-by: Arthur Heymans Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/cpu/intel/model_2065x/finalize.c | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'src/cpu/intel/model_2065x') diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c index 3c1c2db1c4..a0a3fe227b 100644 --- a/src/cpu/intel/model_2065x/finalize.c +++ b/src/cpu/intel/model_2065x/finalize.c @@ -23,23 +23,6 @@ * Document Number 504790 * Revision 1.6.0, June 2012 */ -static void msr_set_bit(unsigned int reg, unsigned int bit) -{ - msr_t msr = rdmsr(reg); - - if (bit < 32) { - if (msr.lo & (1 << bit)) - return; - msr.lo |= 1 << bit; - } else { - if (msr.hi & (1 << (bit - 32))) - return; - msr.hi |= 1 << (bit - 32); - } - - wrmsr(reg, msr); -} - void intel_model_2065x_finalize_smm(void) { /* Lock C-State MSR */ -- cgit v1.2.3