From 3627f2903c8597b8765117146cf2868daecfe305 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 15 Nov 2021 20:11:45 +0100 Subject: cpu/intel/model_2065x: Don't use a magic APIC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the chip configuration to the cpu cluster device. It looks like none of the devicetree were featuring a lapic 0xacac, nor was tcc_offset ever set, so this remains a NOP. Change-Id: I296631511b0e31b0ed43ca8193552483bdab4482 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/59315 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/cpu/intel/model_2065x/chip.h | 3 --- src/cpu/intel/model_2065x/model_2065x_init.c | 13 +++---------- 2 files changed, 3 insertions(+), 13 deletions(-) (limited to 'src/cpu/intel/model_2065x') diff --git a/src/cpu/intel/model_2065x/chip.h b/src/cpu/intel/model_2065x/chip.h index 4ee91f6821..9e89793d80 100644 --- a/src/cpu/intel/model_2065x/chip.h +++ b/src/cpu/intel/model_2065x/chip.h @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* Magic value used to locate this chip in the device tree */ -#define SPEEDSTEP_APIC_MAGIC 0xACAC - struct cpu_intel_model_2065x_config { int tcc_offset; /* TCC Activation Offset */ }; diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index fc8604089c..389989c1ae 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -20,18 +20,11 @@ #include #include -static void configure_thermal_target(void) +static void configure_thermal_target(struct device *dev) { - struct cpu_intel_model_2065x_config *conf; - struct device *lapic; + struct cpu_intel_model_2065x_config *conf = dev->bus->dev->chip_info; msr_t msr; - /* Find pointer to CPU configuration */ - lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC); - if (!lapic || !lapic->chip_info) - return; - conf = lapic->chip_info; - /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); if ((msr.lo & (1 << 30)) && conf->tcc_offset) { @@ -101,7 +94,7 @@ static void model_2065x_init(struct device *cpu) configure_misc(); /* Thermal throttle activation offset */ - configure_thermal_target(); + configure_thermal_target(cpu); /* Set Max Ratio */ set_max_ratio(); -- cgit v1.2.3