From 84fdda381224f0371e27ef3f0ad77ee1103cb05a Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 10 Apr 2018 15:18:38 +0200 Subject: nb/intel/pineview: Use parallel MP init Remove guards around CPU code on which all platforms use parallel MP init code. This removes the option to disable HT siblings. Tested on Foxconn D41S. Change-Id: I89f7d514d75fe933c3a8858da37004419189674b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/25602 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/cpu/intel/model_106cx/model_106cx_init.c | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'src/cpu/intel/model_106cx/model_106cx_init.c') diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 24a9ad29f6..75e110683e 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -17,12 +17,9 @@ #include #include #include -#include #include #include -#include #include -#include #include #include #include @@ -84,20 +81,10 @@ static void model_106cx_init(struct device *cpu) /* Turn on caching if we haven't already */ x86_enable_cache(); - /* Update the microcode */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_update_microcode_from_cbfs(); - /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); - /* Setup MTRRs */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) { - x86_setup_mtrrs(); - x86_mtrr_check(); - } - /* Enable the local CPU APICs */ setup_lapic(); @@ -111,10 +98,6 @@ static void model_106cx_init(struct device *cpu) configure_misc(); /* TODO: PIC thermal sensor control */ - - /* Start up my CPU siblings */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { -- cgit v1.2.3