From 6336d4c48d2f85629ff668da36711ea794f70ab5 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Thu, 25 Jan 2018 21:38:25 +0100
Subject: nb/intel/gm45: Use parallel MP init

This places the parallel mp ops up in the model_1067x dir and is
included from other Intel core2 CPU dirs that can use the same code.

Tested on Thinkpad X200 on which boot time is reduced by ~35ms.

Change-Id: Iac416f671407246ee223075eee1aff511e612889
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/23434
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/cpu/intel/model_1067x/model_1067x_init.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

(limited to 'src/cpu/intel/model_1067x/model_1067x_init.c')

diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index dbb9631ad8..8f8af57037 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -21,12 +21,14 @@
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
+#include <cpu/x86/mp.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/speedstep.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/name.h>
+#include <cpu/intel/smm/gen1/smi.h>
 #include <cpu/intel/common/common.h>
 #include "chip.h"
 
@@ -279,15 +281,18 @@ static void model_1067x_init(struct device *cpu)
 	x86_enable_cache();
 
 	/* Update the microcode */
-	intel_update_microcode_from_cbfs();
+	if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+		intel_update_microcode_from_cbfs();
 
 	/* Print processor name */
 	fill_processor_name(processor_name);
 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
 
 	/* Setup MTRRs */
-	x86_setup_mtrrs();
-	x86_mtrr_check();
+	if (!IS_ENABLED(CONFIG_PARALLEL_MP)) {
+		x86_setup_mtrrs();
+		x86_mtrr_check();
+	}
 
 	/* Enable the local CPU APICs */
 	setup_lapic();
@@ -315,7 +320,8 @@ static void model_1067x_init(struct device *cpu)
 	configure_pic_thermal_sensors(tm2, quad);
 
 	/* Start up my CPU siblings */
-	intel_sibling_init(cpu);
+	if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+		intel_sibling_init(cpu);
 }
 
 static struct device_operations cpu_dev_ops = {
-- 
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