From 26eeb0f8ad554b1fa08d58080da8ce2d22081c1c Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 15 Mar 2017 18:08:50 -0700 Subject: cpu/intel: Fix brace issues detected by checkpatch.pl Fix the following error and warning detected by checkpatch.pl: ERROR: that open brace { should be on the previous line WARNING: braces {} are not necessary for single statement blocks TEST=Build and run on Galileo Gen2 Change-Id: Icdd6bd9ae578589b4d42002d200fa8f83920265e Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/18849 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/cpu/intel/model_1067x/model_1067x_init.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/cpu/intel/model_1067x/model_1067x_init.c') diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index d4bf0f4063..9b7536de57 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -66,9 +66,8 @@ static void configure_c_states(const int quad) msr = rdmsr(MSR_PMG_CST_CONFIG_CONTROL); msr.lo &= ~(1 << 9); // Issue a single stop grant cycle upon stpclk msr.lo |= (1 << 8); - if (quad) { + if (quad) msr.lo = (msr.lo & ~(7 << 0)) | (4 << 0); - } if (c5) { msr.lo &= ~(1 << 13); msr.lo &= ~(7 << 0); @@ -203,9 +202,8 @@ static void configure_misc(const int eist, const int tm2, const int emttm) msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ /* Enable C2E */ - if (((sub_cstates >> (2 * 4)) & 0xf) >= 2) { + if (((sub_cstates >> (2 * 4)) & 0xf) >= 2) msr.lo |= (1 << 26); - } /* Enable C4E */ if (((sub_cstates >> (4 * 4)) & 0xf) >= 2) { -- cgit v1.2.3