From 0b70b0b7901eff1f1f629c09d341bb0eeba5f6c2 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 17 Apr 2024 00:11:15 +0530 Subject: cpu/intel/microcode: Defer microcode patching until after DRAM init Follows Intel SoC recommendation to avoid potential cache contention issues during early (pre-DRAM) microcode loading. Source: MTL_ARL_Processor_Family_BiosSpec_Rev1p0 Document Number: 729384 BUG=b:330536271 TEST=Able to boot to ChromeOS. w/o this patch: [DEBUG] microcode: sig=0xa06a4 pf=0x80 revision=0x19 [INFO ] CBFS: Found 'cpu_microcode_a06a4.bin' @0x1d9c0 size 0x21400 in mcache @0xfef89680 [INFO ] VB2:vb2_digest_init() 136192 bytes, hash algo 2, HW acceleration enabled [INFO ] microcode: load microcode patch [ERROR] microcode: Update failed w/ this patch: [ERROR] Microcode Error: Early microcode patching is not supported due to NEM limitation Change-Id: I1e433f5bede036800b27900b4b13a399b4f45d6f Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/81954 Reviewed-by: Arthur Heymans Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/cpu/intel/microcode/microcode.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/cpu/intel/microcode') diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index 0d52bafb31..b22822641a 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -241,6 +241,12 @@ const void *intel_microcode_find(void) static bool microcode_checked; static const void *ucode_update; + if (ENV_CACHE_AS_RAM) { + printk(BIOS_ERR, "Microcode Error: Early microcode patching is not supported due" + "to NEM limitation\n"); + return NULL; + } + if (microcode_checked) return ucode_update; -- cgit v1.2.3