From 0310d34c2f682b00431a052e770ad44656d1d6f6 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 31 May 2022 21:34:53 +0530 Subject: =?UTF-8?q?cpu/intel/microcode:=20Have=20provision=C2=A0to=20re-lo?= =?UTF-8?q?ad=20microcode=20patch?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch provides an option to reload the microcode patch a.k.a second microcode patch if SoC selects the required RELOAD_MICROCODE_PATCH config. There is a new feature requirement starting with ADL to re-load the microcode patch as per new Mcheck initialization flow. BUG=b:233199592 TEST=Build and boot google/taeko to ChromeOS. Able to re-load microcode patch as below: [INFO ] microcode: Re-load microcode patch [INFO ] microcode: updated to revision 0x41b date=2022-03-08 Signed-off-by: Subrata Banik Change-Id: I0a3c29b3c25fccd31280a2a5a8d4fb22a6cf53bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/64833 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Tarun Tuli --- src/cpu/intel/microcode/Kconfig | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/cpu/intel/microcode/Kconfig') diff --git a/src/cpu/intel/microcode/Kconfig b/src/cpu/intel/microcode/Kconfig index c7bbecbace..6e8acdc01d 100644 --- a/src/cpu/intel/microcode/Kconfig +++ b/src/cpu/intel/microcode/Kconfig @@ -5,3 +5,13 @@ config MICROCODE_UPDATE_PRE_RAM help Select this option if you want to update the microcode during the cache as RAM setup. + +config RELOAD_MICROCODE_PATCH + bool + default n + help + Select this option if SoC recommends to re-load microcode + patch as part of CPU multiprocessor initialization process. + This feature is mostly required with Intel latest generation + processors starting with Alder Lake (with modified MCHECK init + flow). -- cgit v1.2.3