From db70f3bb4d5d58441b1c93d216347ec296b4f787 Mon Sep 17 00:00:00 2001 From: Philipp Deppenwiese Date: Tue, 27 Feb 2018 22:18:11 +0100 Subject: drivers/tpm: Add TPM ramstage driver for devices without vboot. Logic: If vboot is not used and the tpm is not initialized in the romstage makes use of the ramstage driver to initialize the TPM globally without having setup calls in lower SoC level implementations. * Add TPM driver in ramstage chip init which calls the tpm_setup function. * Purge all occurrences of TPM init code and headers. * Only compile TIS drivers into ramstage except for vboot usage. * Remove Google Urara/Rotor TPM support because of missing i2c driver in ramstage. Change-Id: I7536c9734732aeaa85ccc7916c12eecb9ca26b2e Signed-off-by: Philipp Deppenwiese Reviewed-on: https://review.coreboot.org/24905 Reviewed-by: Patrick Rudolph Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/cpu/intel/haswell/romstage.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/cpu/intel/haswell') diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 0e91daee50..b30d4af8b0 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/intel/haswell/raminit.h" #include "southbridge/intel/lynxpoint/pch.h" #include "southbridge/intel/lynxpoint/me.h" -#include #include static inline void reset_system(void) @@ -157,6 +156,4 @@ void romstage_common(const struct romstage_params *params) romstage_handoff_init(wake_from_s3); post_code(0x3f); - if (IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2)) - tpm_setup(wake_from_s3); } -- cgit v1.2.3