From 1b46e76df9ef0a4b38d782732ee914ab70667bfa Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 13 Jul 2021 00:54:32 +0200 Subject: include/cpu/x86/msr: introduce IA32_MC_*(x) macros When accessing the MCA MSRs, the MCA bank number gets multiplied by 4 and added to the IA32_MC0_* define to get the MSR number. Add a macro that already does this calculation to avoid open coding this repeatedly. Change-Id: I2de753b8c8ac8dcff5a94d5bba43aa13bbf94b99 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/56243 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/cpu/intel/haswell/haswell_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/intel/haswell') diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 9fcb527a16..2d8bd152d7 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -528,14 +528,14 @@ static void configure_mca(void) /* Enable all error reporting */ msr.lo = msr.hi = ~0; for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_CTL + (i * 4), msr); + wrmsr(IA32_MC_CTL(i), msr); msr.lo = msr.hi = 0; /* TODO(adurbin): This should only be done on a cold boot. Also, some * of these banks are core vs package scope. For now every CPU clears * every bank. */ for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); } /* All CPUs including BSP will run the following function. */ -- cgit v1.2.3