From bda1c552e9acc4f6e1da44504343abb189590bb9 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 29 Oct 2020 00:08:24 +0100 Subject: cpu/intel/haswell/acpi.c: Use C-state enum definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 does not change. Change-Id: I0ca98cbe45e10d233607f68923f08752fdda9698 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/46923 Reviewed-by: Arthur Heymans Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/cpu/intel/haswell/haswell_init.c | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'src/cpu/intel/haswell/haswell_init.c') diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index dd1970c033..fa2f3f631c 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -20,27 +20,6 @@ #include "haswell.h" #include "chip.h" -/* - * List of supported C-states in this processor. Only the ULT parts support C8, - * C9, and C10. - */ -enum { - C_STATE_C0, /* 0 */ - C_STATE_C1, /* 1 */ - C_STATE_C1E, /* 2 */ - C_STATE_C3, /* 3 */ - C_STATE_C6_SHORT_LAT, /* 4 */ - C_STATE_C6_LONG_LAT, /* 5 */ - C_STATE_C7_SHORT_LAT, /* 6 */ - C_STATE_C7_LONG_LAT, /* 7 */ - C_STATE_C7S_SHORT_LAT, /* 8 */ - C_STATE_C7S_LONG_LAT, /* 9 */ - C_STATE_C8, /* 10 */ - C_STATE_C9, /* 11 */ - C_STATE_C10, /* 12 */ - NUM_C_STATES -}; - #define MWAIT_RES(state, sub_state) \ { \ .addrl = (((state) << 4) | (sub_state)), \ -- cgit v1.2.3