From 75e297428f6a88406fa3e1c0b54ab3d4f411db5c Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 10 Oct 2013 20:37:04 -0500 Subject: coreboot: config to cache ramstage outside CBMEM Haswell was the original chipset to store the cache in another area besides CBMEM. However, it was specific to the implementation. Instead, provide a generic way to obtain the location of the ramstage cache. This option is selected using the CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM Kconfig option. BUG=chrome-os-partner:23249 BRANCH=None TEST=Built and booted with baytrail support. Also built for falco successfully. Change-Id: I70d0940f7a8f73640c92a75fd22588c2c234241b Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/172602 Reviewed-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/4876 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/cpu/intel/haswell/haswell.h | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'src/cpu/intel/haswell/haswell.h') diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index dcd5dc70ea..190abc65ee 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -215,22 +215,6 @@ void release_aps_for_smm_relocation(int do_parallel_relocation); extern int ht_disabled; #endif -/* This structure is saved along with the relocated ramstage program in SMM - * space. It is used to protect the integrity of the ramstage program on S3 - * resume by saving a copy of the relocated ramstage in SMM space with the - * assumption that the SMM region cannot be altered from the OS. The magic - * value just serves as a quick sanity check. */ - -#define RAMSTAGE_CACHE_MAGIC 0xf3c3a02a - -struct ramstage_cache { - uint32_t magic; - uint32_t entry_point; - uint32_t load_address; - uint32_t size; - char program[0]; -} __attribute__((packed)); - /* CPU identification */ int haswell_family_model(void); int haswell_stepping(void); -- cgit v1.2.3