From 2e25ac6afe84d9535fa6d89b847915e96f5d266b Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 3 Jul 2020 12:06:04 +0200 Subject: haswell: relocate `romstage_common` to northbridge Other platforms do this as well. It will ease refactoring on follow-ups. Change-Id: I643982a58c6f5370c78acef93740f27df001a06d Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43093 Tested-by: build bot (Jenkins) Reviewed-by: Tristan Corrick --- src/cpu/intel/haswell/haswell.h | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'src/cpu/intel/haswell/haswell.h') diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index 7906b8355b..b336e4c2c6 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -118,16 +118,6 @@ # error "CONFIG_IED_REGION_SIZE is not a power of 2" #endif -struct pei_data; -struct rcba_config_instruction; -struct romstage_params { - struct pei_data *pei_data; - const void *gpio_map; - const struct rcba_config_instruction *rcba_config; - void (*copy_spd)(struct pei_data *); -}; -void romstage_common(const struct romstage_params *params); - /* Lock MSRs */ void intel_cpu_haswell_finalize_smm(void); -- cgit v1.2.3