From 5f06d53bdb3621ff9e232d4f070f9ff4bbacfa4c Mon Sep 17 00:00:00 2001 From: David Guckian Date: Mon, 9 Nov 2015 16:19:18 +0000 Subject: intel/fsp_rangeley: Load BSP microcode in bootblock Load microcode to BSP in bootblock so later on the FSP TempRamInit call will return with success. The updated fsp1_0 driver calls TempRamInit API with dummy microcode, so FSP will not handle the microcode load. If BSP is not loaded with microcode before calling TempRamInit API, the call will fail with error No Valid Microcode Was Found. Change-Id: I9c55acaf3353a759bb0119f0a5402a704ffb2c4a Signed-off-by: David Guckian Reviewed-on: http://review.coreboot.org/12367 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: York Yang --- src/cpu/intel/fsp_model_406dx/bootblock.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/cpu/intel/fsp_model_406dx/bootblock.c') diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c index ab9bcffaee..edbbe1b362 100644 --- a/src/cpu/intel/fsp_model_406dx/bootblock.c +++ b/src/cpu/intel/fsp_model_406dx/bootblock.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -86,6 +87,10 @@ static void bootblock_cpu_init(void) { /* Check for Warm Reset */ check_for_warm_reset(); + + /* Load microcode before any caching. */ + intel_update_microcode_from_cbfs(); + enable_rom_caching(); set_no_evict_mode_msr(); } -- cgit v1.2.3