From ba92428514d8cac8045faa1dc573599424ef7231 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Fri, 27 Jun 2014 12:13:30 +1000 Subject: intel: Make monotonic timer a first class citizen MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The monotonic time now needs to be a first class citizen in Coreboot as it is a hard dependency of the drivers/spi flash command polling function. Change-Id: I4e43d2680bf84bc525138f71c2b813b0f6be5265 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/6135 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks Reviewed-by: Kyösti Mälkki --- src/cpu/intel/fsp_model_206ax/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cpu/intel/fsp_model_206ax') diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 0fb4437cbd..043320cbe9 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -39,6 +39,7 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS if HAVE_FSP_BIN select PARALLEL_CPU_INIT select TSC_SYNC_MFENCE + select LAPIC_MONOTONIC_TIMER config BOOTBLOCK_CPU_INIT string -- cgit v1.2.3