From e08c29e0e7f1c1e8682bdb66ce0c51d168fdd502 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sun, 25 Apr 2010 21:43:29 +0000 Subject: a single place for the romstage stack for copy_and_run. geode lx and amd opteron don't use this yet. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/intel/car/cache_as_ram.inc | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) (limited to 'src/cpu/intel/car') diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index 2f2a9ca81f..f6a7e12e0d 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -30,6 +30,7 @@ #define CacheSize CONFIG_DCACHE_RAM_SIZE #define CacheBase (0xd0000 - CacheSize) +#include #include /* Save the BIST result */ @@ -398,16 +399,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run -- cgit v1.2.3