From 5bc641afebda5fd274ba713add4145651d9bc71d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 9 Aug 2019 09:37:49 +0300 Subject: cpu/intel: Refactor platform_enter_postcar() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are benefits in placing the postcar_frame structure in .bss and returning control to romstage_main(). Change-Id: I0418a2abc74f749203c587b2763c5f8a5960e4f9 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34808 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/intel/car/romstage.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'src/cpu/intel/car') diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 89052d6be6..f6b62192f1 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -22,6 +22,21 @@ #define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000 +static struct postcar_frame early_mtrrs; + +/* prepare_and_run_postcar() determines the stack to use after + * cache-as-ram is torn down as well as the MTRR settings to use. */ +static void prepare_and_run_postcar(struct postcar_frame *pcf) +{ + if (postcar_frame_init(pcf, 0)) + die("Unable to initialize postcar frame.\n"); + + fill_postcar_frame(pcf); + + run_postcar_phase(pcf); + /* We do not return here. */ +} + static void romstage_main(unsigned long bist) { int i; @@ -52,7 +67,8 @@ static void romstage_main(unsigned long bist) printk(BIOS_DEBUG, "Smashed stack detected in romstage!\n"); } - platform_enter_postcar(); + prepare_and_run_postcar(&early_mtrrs); + /* We do not return here. */ } #if !CONFIG(C_ENVIRONMENT_BOOTBLOCK) -- cgit v1.2.3