From 1fa240a3c5d2a6e8cd63eff24f227abc3333753b Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 12 Nov 2019 12:05:38 +0100 Subject: cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Console is not yet enabled in bootblock. This will be done in a different CL. Change-Id: Ic751d42a1969fb79fb50366f766d8796846a0bc4 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36774 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/cpu/intel/car/p3/cache_as_ram.S | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/cpu/intel/car') diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S index 23df701e08..5262b1886d 100644 --- a/src/cpu/intel/car/p3/cache_as_ram.S +++ b/src/cpu/intel/car/p3/cache_as_ram.S @@ -18,14 +18,10 @@ #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE -#if !CONFIG(ROMCC_BOOTBLOCK) #if ((CONFIG_C_ENV_BOOTBLOCK_SIZE & (CONFIG_C_ENV_BOOTBLOCK_SIZE - 1)) != 0) #error "CONFIG_C_ENV_BOOTBLOCK_SIZE must be a power of 2!" #endif #define XIP_ROM_SIZE CONFIG_C_ENV_BOOTBLOCK_SIZE -#else -#define XIP_ROM_SIZE CONFIG_XIP_ROM_SIZE -#endif .global bootblock_pre_c_entry -- cgit v1.2.3