From 07921540dda79d810d8bfc6be211513c238a0d63 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 17 Jun 2016 17:22:00 +0300 Subject: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I02881ce465cb3835a6fa7c06b718aa42d0d327ec Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/15227 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/cpu/intel/car/cache_as_ram.inc | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/cpu/intel/car') diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index e28d033837..349ec05f03 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -318,7 +318,12 @@ lout: /* We need to set EBP? No need. */ movl %esp, %ebp pushl %eax /* BIST */ - call main + call romstage_main + + /* Save return value from romstage_main. It contains the stack to use + * after cache-as-ram is torn down. It also contains the information + * for setting up MTRRs. */ + movl %eax, %ebx /* We don't need CAR from now on. */ @@ -356,7 +361,8 @@ __main: post_code(POST_PREPARE_RAMSTAGE) cld /* Clear direction flag. */ - movl $CONFIG_RAMTOP, %esp + /* Setup stack as indicated by return value from romstage_main(). */ + movl %ebx, %esp movl %esp, %ebp call copy_and_run -- cgit v1.2.3