From 348b79f05733d1186ccd3b03a990fa4694885e7e Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 3 Jun 2018 17:14:19 +0200 Subject: cpu/intel/car: Align the stack to 16 bytes before romstage_main Change-Id: I1415c18779bc481fdec5f72f83c06a58ce6d5c39 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/26797 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/cpu/intel/car/p4-netburst/cache_as_ram.S | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/cpu/intel/car/p4-netburst') diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S index 95ecba96bd..60423967a5 100644 --- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S +++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S @@ -355,6 +355,10 @@ skip_cache_rom: /* Setup the stack. */ movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax movl %eax, %esp + /* Align the stack 16 bytes */ + andl $0xfffffff0, %esp + /* Account for pushing the BIST result */ + subl $12, %esp /* Restore the BIST result. */ movl %ebp, %eax -- cgit v1.2.3