From eb84f6a978147fbe543fbe15af254632f215098a Mon Sep 17 00:00:00 2001 From: Nils Jacobs Date: Mon, 9 Jan 2012 20:27:07 +0100 Subject: Fix Geode GX2 + LX caching for tiny bootblock. Change-Id: If681a33deb7df752b37c6a8a20482d3c374af936 Signed-off-by: Nils Jacobs Reviewed-on: http://review.coreboot.org/528 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Philip Prindeville --- src/cpu/amd/model_lx/msrinit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/amd') diff --git a/src/cpu/amd/model_lx/msrinit.c b/src/cpu/amd/model_lx/msrinit.c index 9c6e98e14c..11182501c1 100644 --- a/src/cpu/amd/model_lx/msrinit.c +++ b/src/cpu/amd/model_lx/msrinit.c @@ -22,10 +22,10 @@ static const msrinit_t msr_table[] = { - {CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB. + {CPU_RCONF_DEFAULT, {.hi = 0x24fffc00,.lo = 0x0000A000}}, /* Setup access to cache under 1MB. * Rom Properties: Write Serialize, WriteProtect. * RomBase: 0xFFFC0 - * SysTop to RomBase Properties: Write Serialize, Cache Disable. + * SysTop to RomBase Properties: Write Back. * SysTop: 0x000A0 * System Memory Properties: (Write Back) */ {CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */ -- cgit v1.2.3