From df22f780f1894d1ef2e35d51f430caf8f25211ed Mon Sep 17 00:00:00 2001 From: "Marc Jones(marc.jones" Date: Mon, 7 Apr 2008 17:49:57 +0000 Subject: Don't check exclusive IRQ fieldin the PIR table. This field is rarely used (and not used in the LX tables). There is not a good reason to mask off non-exclusive IRQs. Signed-off-by: Marc Jones(marc.jones@amd.com) Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/model_10xxx/fidvid_common.c | 312 ------------------- src/cpu/amd/model_10xxx/mc_patch_01000018.h | 163 ---------- src/cpu/amd/model_10xxx/mc_patch_01000033.h | 163 ---------- src/cpu/amd/model_10xxx/mc_patch_01000035.h | 163 ---------- src/cpu/amd/model_10xxx/pstate.c | 456 ---------------------------- 5 files changed, 1257 deletions(-) delete mode 100644 src/cpu/amd/model_10xxx/fidvid_common.c delete mode 100644 src/cpu/amd/model_10xxx/mc_patch_01000018.h delete mode 100644 src/cpu/amd/model_10xxx/mc_patch_01000033.h delete mode 100644 src/cpu/amd/model_10xxx/mc_patch_01000035.h delete mode 100644 src/cpu/amd/model_10xxx/pstate.c (limited to 'src/cpu/amd') diff --git a/src/cpu/amd/model_10xxx/fidvid_common.c b/src/cpu/amd/model_10xxx/fidvid_common.c deleted file mode 100644 index aa82323b97..0000000000 --- a/src/cpu/amd/model_10xxx/fidvid_common.c +++ /dev/null @@ -1,312 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - -#include - - -static u32 get_vstime(u32 nodeid, u32 slam) -{ - u32 val; - u32 v; - device_t dev; - -#if defined(__ROMCC__) - dev = NODE_PCI(nodeid, 3); -#else - dev = get_node_pci(nodeid, 3); -#endif - - val = pci_read_config32(dev, 0xd8); - - val >>= slam?0:4; - val &= 7; - - switch (val) { - case 4: v = 60; break; - case 5: v = 100; break; - case 6: v = 200; break; - case 7: v = 500; break; - default: - v = (val+1)*10; // in us - } - - return v; -} - -static void udelay_tsc(u32 us) -{ - /* Use TSC to delay because it is fixed, ie. it will not changed with p-states. - * Also, We use the APIC TIMER register is to hold flags for AP init. - */ - u32 dword; - tsc_t tsc, tsc1, tscd; - u32 d = 0x00000200; //800Mhz or 200Mhz or 1.6G or get the NBFID at first - u32 dn = 0x1000000/2; // howmany us need to use hi - - tscd.hi = us/dn; - tscd.lo = (us - tscd.hi * dn) * d; - - tsc1 = rdtsc(); - dword = tsc1.lo + tscd.lo; - if((dwordtsc1.hi) || ((tsc.hi==tsc1.hi) && (tsc.lo>tsc1.lo))); - -} - -#ifdef __ROMCC__ -void udelay(u32 usecs) -{ - udelay_tsc(usecs); -} -#endif - -static u32 set_vid(u32 newvid, u32 bit_offset, u32 nodeid, u32 coreid) -{ - u32 val; - msr_t msr; - u32 curvid; - u32 slam; - u32 delay; - u32 count = 3; - device_t dev; - - msr = rdmsr(0xc0010071);//status - curvid = (msr.lo >> bit_offset) & 0x7f; // seven bits - - if(newvid == curvid) return curvid; - -#if defined(__ROMCC__) - dev = NODE_PCI(nodeid, 3); -#else - dev = get_node_pci(nodeid, 3); -#endif - - val = pci_read_config32(dev, 0xa0); - - slam = (val >> 29) & 1; - delay = get_vstime(nodeid, slam); - - if(!slam) { - if(curvid>newvid) { - count = (curvid - newvid) * 2; - } else { - count = (newvid - curvid) * 2; - } - } - - while(count-->0) { - if(slam) { - curvid = newvid; - } - else { //ramp - if(curvid>newvid) { - curvid--; - } else { - curvid++; - } - } - - msr = rdmsr(0xc0010070); //control - msr.lo &= ~(0x7f<> bit_offset) & 0x7f; // seven bits - - if(curvid == newvid) break; - - } - - return curvid; -} - - -static u32 set_nb_vid(u32 newvid, u32 nodeid, u32 coreid) -{ - return set_vid(newvid, 25, nodeid, coreid); -} - - -static u32 set_core_vid(u32 newvid, u32 nodeid, u32 coreid) -{ - return set_vid(newvid, 9, nodeid, coreid); -} - - -static unsigned set_cof(u32 val, u32 mask, u32 nodeid, u32 coreid) -{ - msr_t msr; - int count = 3; - - val &= mask; - - // FIXME: What is count for? Why 3 times? What about node and core id? - while(count-- > 0) { - - msr = rdmsr(0xc0010071); - msr.lo &= mask; - if(msr.lo == val) break; - - msr = rdmsr(0xc0010070); - msr.lo &= ~(mask); - msr.lo |= val; - wrmsr(0xc0010070, msr); - } - - return msr.lo; -} - -static u32 set_core_cof(u32 fid, u32 did, u32 nodeid, u32 coreid) -{ - u32 val; - u32 mask; - - mask = (7<<6) | 0x3f; - val = ((did & 7)<<6) | (fid & 0x3f); - - return set_cof(val, mask, nodeid, coreid); - -} - - -static u32 set_nb_cof(u32 did, u32 nodeid, u32 coreid) // fid need warmreset -{ - u32 val; - u32 mask; - - mask = 1<<22; - val = (did & 1)<<22; - - return set_cof(val, mask, nodeid, coreid); - -} - - -/* set vid and cof for core and nb after warm reset is not started by BIOS */ -static void set_core_nb_max_pstate_after_other_warm_reset(u32 nodeid, u32 coreid) // P0 -{ - msr_t msr; - u32 val; - u32 vid; - u32 mask; - u32 did; - device_t dev; - - msr = rdmsr(0xc0010064); - -#if defined(__ROMCC__) - dev = NODE_PCI(nodeid, 3); -#else - dev = get_node_pci(nodeid, 3); -#endif - - val = pci_read_config32(dev, 0xa0); - if((val>>8) & 1) { // PVI - vid = (msr.lo >> 25) & 0x7f; - } else { //SVI - vid = (msr.lo >> 9) & 0x7f; - } - set_core_vid(vid, nodeid, coreid); - - mask = (0x7<<6) | 0x3f; - val = msr.lo & mask; - set_cof(val, mask, nodeid, coreid); - - //set nb cof and vid - did = (msr.lo >> 22) & 1; - vid = (msr.lo >> 25) & 0x7f; - if(did) { - set_nb_cof(did, nodeid, coreid); - set_nb_vid(vid, nodeid, coreid); - } else { - set_nb_vid(vid, nodeid, coreid); - set_nb_cof(did, nodeid, coreid); - } - - //set the p state - msr.hi = 0; - msr.lo = 0; - wrmsr(0xc0010062, msr); - -} - - -/* set vid and cof for core and nb after warm reset is not started by BIOS */ -static void set_core_nb_min_pstate_after_other_warm_reset(u32 nodeid, u32 coreid) // Px -{ - msr_t msr; - u32 val; - u32 vid; - u32 mask; - u32 did; - u32 pstate; - device_t dev; - -#if defined(__ROMCC__) - dev = NODE_PCI(nodeid, 3); -#else - dev = get_node_pci(nodeid, 3); -#endif - - - val = pci_read_config32(dev, 0xdc); //PstateMaxVal - - pstate = (val >> 8) & 0x7; - - msr = rdmsr(0xc0010064 + pstate); - - mask = (7<<6) | 0x3f; - val = msr.lo & mask; - set_cof(val, mask, nodeid, coreid); - - val = pci_read_config32(dev, 0xa0); - if((val>>8) & 1) { // PVI - vid = (msr.lo>>25) & 0x7f; - } else { //SVI - vid = (msr.lo>>9) & 0x7f; - } - set_core_vid(vid, nodeid, coreid); - - //set nb cof and vid - did = (msr.lo >> 22) & 1; - vid = (msr.lo >> 25) & 0x7f; - if(did) { - set_nb_cof(did, nodeid, coreid); - set_nb_vid(vid, nodeid, coreid); - } else { - set_nb_vid(vid, nodeid, coreid); - set_nb_cof(did, nodeid, coreid); - } - - //set the p state - msr.hi = 0; - msr.lo = pstate; - wrmsr(0xc0010062, msr); -} diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000018.h b/src/cpu/amd/model_10xxx/mc_patch_01000018.h deleted file mode 100644 index eebe89b92b..0000000000 --- a/src/cpu/amd/model_10xxx/mc_patch_01000018.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - ============================================================ - (c) Advanced Micro Devices, Inc., 2004-2005 - - The enclosed microcode is intended to be used with AMD - Microprocessors. You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x07, 0x20, 0x08, 0x02, 0x18, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x66, 0x70, 0x30, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x44, 0x06, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xa4, 0x06, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, -0x72, 0x09, 0x00, 0x00, 0x70, 0x09, 0x00, 0x00, 0x9b, 0x0b, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xff, 0x81, 0x7f, 0x00, 0xc3, 0x3f, 0x80, 0x37, -0xfc, 0x07, 0xfe, 0x01, 0x0d, 0xff, 0x00, 0xfe, 0xf0, 0x1f, 0xf8, 0x07, -0x37, 0xfc, 0x03, 0xf8, 0xc0, 0xff, 0xf7, 0x00, 0x80, 0xff, 0xc0, 0x3f, -0x9b, 0xe1, 0x1f, 0xc0, 0x00, 0xfe, 0x03, 0xff, 0xff, 0x86, 0x7f, 0x00, -0x03, 0xf8, 0x0f, 0xfc, 0xfc, 0x1b, 0xfe, 0x01, 0x00, 0x40, 0x37, 0x6b, -0xff, 0xfb, 0xfd, 0xff, 0x57, 0x7d, 0xf0, 0xcd, 0xff, 0x1f, 0xb7, 0xfe, -0xc0, 0xcf, 0xc3, 0x3f, 0xff, 0x01, 0xff, 0xf7, 0x00, 0x02, 0x07, 0xff, -0x35, 0x00, 0x90, 0x8b, 0xf0, 0x0f, 0xe0, 0x3f, 0x07, 0xf0, 0x6f, 0xf8, -0xc0, 0x3f, 0x80, 0xff, 0x1f, 0xc0, 0xbf, 0xe1, 0x03, 0xff, 0x00, 0xfe, -0x7f, 0x00, 0xff, 0x86, 0xff, 0x1e, 0x00, 0xf8, 0x1f, 0xf8, 0x07, 0xf0, -0xfc, 0x03, 0x78, 0x33, 0x7f, 0xe0, 0x1f, 0xc0, 0xf0, 0x0f, 0xe0, 0xdf, -0xff, 0x81, 0x7f, 0x00, 0xc3, 0x3f, 0x80, 0x7f, 0xfc, 0x7f, 0x0f, 0x00, -0xf8, 0x0f, 0xfc, 0x03, 0x19, 0xfe, 0x01, 0xbc, 0xe0, 0x3f, 0xf0, 0x0f, -0x6f, 0xf8, 0x07, 0xf0, 0x80, 0xff, 0xc0, 0x3f, 0xbf, 0xe1, 0x1f, 0xc0, -0x00, 0xb4, 0xb2, 0x06, 0xbf, 0xdf, 0xff, 0xff, 0xd5, 0x07, 0xdf, 0x7c, -0x67, 0xb2, 0xe7, 0xf9, 0xfc, 0x3c, 0xfc, 0x03, 0x1f, 0xf0, 0x7f, 0xff, -0x20, 0x70, 0xf0, 0x0f, 0x03, 0x00, 0xed, 0x58, 0xff, 0x00, 0xfe, 0x03, -0x00, 0xff, 0x86, 0x7f, 0xfc, 0x03, 0xf8, 0x0f, 0x01, 0xfc, 0x1b, 0xfe, -0xf0, 0x0f, 0xe0, 0x3f, 0x07, 0xf0, 0x6f, 0xf8, 0xef, 0x01, 0x80, 0xff, -0xff, 0xff, 0x29, 0x2a, 0x5f, 0xd0, 0xc1, 0xc3, 0xff, 0xff, 0xb3, 0xdd, -0xff, 0x7e, 0xfd, 0x0f, 0x1f, 0xf8, 0x57, 0xf6, 0xbc, 0x63, 0x2d, 0x3c, -0x03, 0xd4, 0x00, 0x40, 0xff, 0xd7, 0xbf, 0xb7, 0xe1, 0xdf, 0xeb, 0xe7, -0xef, 0xff, 0xff, 0x57, 0x87, 0x7f, 0xbf, 0xea, 0xfa, 0x0f, 0xfc, 0x03, -0x1f, 0xbe, 0xf5, 0xfc, 0x80, 0x02, 0x4b, 0x00, 0x8a, 0xca, 0xff, 0x7f, -0xf0, 0xf0, 0x17, 0x74, 0x6c, 0xf7, 0xff, 0xff, 0xff, 0xc3, 0xbf, 0x5f, -0x95, 0xfd, 0x07, 0xfe, 0x0b, 0x0f, 0xef, 0x58, 0x00, 0xd0, 0x00, 0x35, -0xab, 0xea, 0xff, 0xfb, 0x05, 0x78, 0xf4, 0x67, 0xff, 0xd5, 0xfb, 0xff, -0xaf, 0xfa, 0xe1, 0xdf, 0xff, 0x80, 0xfe, 0x03, 0x3d, 0xff, 0x87, 0x6f, -0x12, 0x00, 0xa0, 0xc0, 0xff, 0x0f, 0xf0, 0xaf, 0x03, 0xf8, 0x3f, 0xfc, -0xff, 0x2f, 0xc0, 0xff, 0x2d, 0x65, 0xff, 0xf0, 0x0d, 0xfe, 0x04, 0xb6, -0x2f, 0x03, 0xad, 0xc3, 0x51, 0x0d, 0x00, 0x8c, 0xff, 0xfe, 0x03, 0xf8, -0xff, 0xb9, 0xc9, 0x19, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, -0xff, 0xc0, 0x3f, 0x80, 0xe1, 0x1f, 0xc0, 0xbf, 0xf2, 0xb9, 0x06, 0x00, -0xfc, 0x07, 0xfe, 0x01, 0x0d, 0xff, 0x00, 0xfe, 0xf0, 0x1f, 0xf8, 0x07, -0x37, 0xfc, 0x03, 0xf8, 0xc0, 0x7f, 0xe0, 0x1f, 0xdf, 0xf0, 0x0f, 0xe0, -0x00, 0xff, 0xdf, 0x03, 0x00, 0xfe, 0x03, 0xff, 0xff, 0x86, 0x7f, 0x00, -0x03, 0xf8, 0x0f, 0xfc, 0xfc, 0x1b, 0xfe, 0x01, 0x0f, 0xe0, 0x3f, 0xf0, -0xf0, 0x6f, 0xf8, 0x07, 0x01, 0x80, 0xff, 0xef, 0x7f, 0x00, 0xff, 0x81, -0x80, 0x7f, 0xc3, 0x3f, 0xfe, 0x01, 0xfc, 0x07, 0x00, 0xfe, 0x0d, 0xff, -0xf8, 0x07, 0xf0, 0x1f, 0x03, 0xf8, 0x37, 0xfc, 0xd7, 0x00, 0x40, 0x34, -0xc0, 0x3f, 0x80, 0xff, 0x1f, 0xc0, 0xbf, 0xe1, 0x03, 0xff, 0x00, 0xfe, -0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8, 0xfe, 0x01, 0xfc, 0x1b, -0x9a, 0x6b, 0x00, 0x00, 0x7f, 0xe0, 0x1f, 0xc0, 0xf0, 0x0f, 0xe0, 0xdf, -0xff, 0x81, 0x7f, 0x00, 0xc3, 0x3f, 0x80, 0x7f, 0xfc, 0x07, 0xfe, 0x01, -0x0d, 0xff, 0x00, 0xfe, 0xf0, 0xff, 0x3d, 0x00, 0xf4, 0x3f, 0xf0, 0xaf, -0x72, 0xf8, 0x55, 0xaa, 0xd2, 0x7b, 0xcf, 0x3f, 0xfc, 0xe1, 0x5b, 0xa9, -0x80, 0xff, 0x93, 0xff, 0x81, 0x87, 0x7f, 0x00, 0x00, 0xf8, 0xff, 0x1e, -0x67, 0xf2, 0x1f, 0xf8, 0xfc, 0x3c, 0xfc, 0x03, 0x1f, 0xc0, 0x7f, 0xe0, -0xe0, 0xdf, 0xf0, 0x0f, 0x7f, 0x00, 0xff, 0x81, 0x80, 0x7f, 0xc3, 0x3f, -0x0f, 0x00, 0xdc, 0x7f, 0xfe, 0x73, 0xfb, 0xff, 0xf4, 0x22, 0x1f, 0xde, -0xc0, 0x9f, 0x40, 0x5d, 0x63, 0xc0, 0x75, 0xf8, 0xe5, 0x3f, 0xb5, 0xff, -0xdd, 0xef, 0xf8, 0xe1, 0xbf, 0x07, 0x00, 0xfe, 0x7f, 0xff, 0x9d, 0xfc, -0xff, 0x00, 0x3f, 0x0f, 0xfe, 0xff, 0x7f, 0xf2, 0xfc, 0x03, 0xfc, 0x3c, -0xff, 0xff, 0x3f, 0xc0, 0xf0, 0xfd, 0x64, 0xf0, 0x08, 0x90, 0x00, 0x00, -0xfe, 0xbf, 0xff, 0xdc, 0x87, 0x37, 0xae, 0x88, 0xfb, 0x0f, 0xfc, 0x33, -0x1f, 0xfe, 0x98, 0x96, 0xcd, 0xff, 0xff, 0x5f, 0x7e, 0x78, 0xa7, 0xba, -0x00, 0x04, 0x48, 0x00, 0x00, 0xff, 0x81, 0x7f, 0xf2, 0xc3, 0x3b, 0x13, -0xfd, 0xfd, 0x37, 0xff, 0x3f, 0x0f, 0xff, 0x7e, 0xd6, 0xf7, 0xff, 0xfd, -0xe5, 0x3b, 0xfc, 0x71, 0x00, 0x80, 0xff, 0xef, 0x3f, 0x80, 0xff, 0xc0, -0xc0, 0xbf, 0xe1, 0x1f, 0xff, 0x00, 0xfe, 0x03, 0x00, 0xff, 0x86, 0x7f, -0xfc, 0x03, 0xf8, 0x0f, 0x01, 0xfc, 0x1b, 0xfe, 0x7b, 0x00, 0xe0, 0xff, -0xe0, 0x1f, 0xc0, 0x7f, 0x0f, 0xe0, 0xdf, 0xf0, 0x81, 0x7f, 0x00, 0xff, -0x3f, 0x80, 0x7f, 0xc3, 0x07, 0xfe, 0x01, 0xfc, 0xff, 0x00, 0xfe, 0x0d, -0xff, 0x3d, 0x00, 0xf0, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, -0xff, 0xc0, 0x3f, 0x80, 0xe1, 0x1f, 0xc0, 0xbf, 0xfe, 0x03, 0xff, 0x00, -0x86, 0x7f, 0x00, 0xff, 0xf8, 0xff, 0x1e, 0x00, 0xf0, 0x1f, 0xf8, 0x07, -0x37, 0xfc, 0x03, 0xf8, 0xc0, 0x7f, 0xe0, 0x1f, 0xdf, 0xf0, 0x0f, 0xe0, -0x00, 0xff, 0x81, 0x7f, 0x7f, 0xc3, 0x3f, 0x80, 0x00, 0xfc, 0x7f, 0x0f, -0x03, 0xf8, 0x0f, 0xfc, 0xfc, 0x1b, 0xfe, 0x01, 0x0f, 0xe0, 0x3f, 0xf0, -0xf0, 0x6f, 0xf8, 0x07, 0x3f, 0x80, 0xff, 0xc0, 0xc0, 0xbf, 0xe1, 0x1f, -0x07, 0x00, 0xfe, 0xbf, 0xfe, 0x01, 0xfc, 0x07, 0x00, 0xfe, 0x0d, 0xff, -0xf8, 0x07, 0xf0, 0x1f, 0x03, 0xf8, 0x37, 0xfc, 0xe0, 0x1f, 0xc0, 0x7f, -0x0f, 0xe0, 0xdf, 0xf0, 0xdf, 0x03, 0x00, 0xff, 0x03, 0xff, 0x00, 0xfe, -0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8, 0xfe, 0x01, 0xfc, 0x1b, -0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000033.h b/src/cpu/amd/model_10xxx/mc_patch_01000033.h deleted file mode 100644 index d115c9f17f..0000000000 --- a/src/cpu/amd/model_10xxx/mc_patch_01000033.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - ============================================================ - (c) Advanced Micro Devices, Inc., 2004-2005 - - The enclosed microcode is intended to be used with AMD - Microprocessors. You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x07, 0x20, 0x27, 0x06, 0x33, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0xDE, 0x76, 0xD5, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x20, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x70, 0x09, 0x00, 0x00, -0x49, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xC1, 0x08, 0x00, 0x00, -0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0xFF, 0xFF, 0x29, 0xC3, 0x5F, 0xD0, 0xC1, -0xBD, 0xFF, 0xFF, 0xB3, 0x0F, 0xFF, 0x7E, 0xFD, 0xF6, 0x1F, 0xF8, 0x57, -0x3C, 0xBC, 0x63, 0x2D, 0x80, 0x96, 0xD6, 0x00, 0xAA, 0xFF, 0xEF, 0xAF, -0xE0, 0xD1, 0x9F, 0x15, 0x57, 0xEF, 0xFF, 0xFF, 0xEA, 0x87, 0x7F, 0xBF, -0x03, 0xFA, 0x0F, 0xFC, 0xFC, 0x1F, 0xBE, 0xF5, 0x00, 0xE0, 0x4A, 0x4B, -0x7F, 0xC8, 0xFF, 0xF7, 0xB4, 0xF8, 0xF0, 0x2F, 0xFF, 0x1F, 0xC5, 0xFE, -0xC0, 0xCF, 0xC3, 0x3F, 0xFF, 0x03, 0xD4, 0xFF, 0x40, 0xC8, 0x0F, 0xEF, -0x3D, 0x00, 0xF0, 0xFF, 0xFB, 0xAF, 0xE5, 0xBF, 0xD7, 0xFA, 0x3F, 0xF8, -0xEB, 0x3F, 0x97, 0xFF, 0x9F, 0xEB, 0xFF, 0xE0, 0x97, 0xFF, 0x5E, 0xFE, -0x7F, 0xAE, 0xFA, 0x83, 0xC9, 0x1A, 0x00, 0x08, 0x9F, 0xFC, 0x07, 0xF0, -0x7C, 0x7B, 0xD9, 0x1F, 0x7F, 0xE0, 0x1F, 0xC0, 0xF0, 0x0F, 0xE0, 0xDF, -0xFF, 0x81, 0x7F, 0x00, 0xC3, 0x3F, 0x80, 0x7F, 0xFC, 0x7F, 0x0F, 0x00, -0xF8, 0x0F, 0xFC, 0x03, 0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0x3F, 0xF0, 0x0F, -0x6F, 0xF8, 0x07, 0xF0, 0x80, 0xFF, 0xC0, 0x3F, 0xBF, 0xE1, 0x1F, 0xC0, -0x00, 0xFE, 0xBF, 0x07, 0x01, 0xFC, 0x67, 0xEB, 0x00, 0x07, 0xFE, 0xDE, -0xFF, 0x02, 0x00, 0xE0, 0xFD, 0x3F, 0xBC, 0x63, 0xFF, 0x8B, 0xFF, 0xFF, -0xF5, 0x7F, 0xF0, 0xEF, 0x03, 0x00, 0x3D, 0x57, 0xFF, 0x58, 0xFE, 0xBF, -0xAC, 0x7C, 0x83, 0x3F, 0xFF, 0x7F, 0xF9, 0xE2, 0x01, 0x7E, 0x1E, 0xFE, -0x1B, 0x0F, 0xE0, 0xBF, 0xF7, 0xF6, 0x3A, 0xF0, 0xAF, 0x01, 0x80, 0xB4, -0x81, 0x7F, 0x00, 0xFF, 0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC, -0xFF, 0x00, 0xFE, 0x0D, 0x1F, 0xF8, 0x07, 0xF0, 0xFC, 0x03, 0xF8, 0x37, -0xFF, 0xF7, 0x00, 0xC0, 0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF, -0xFE, 0x03, 0xFF, 0x00, 0x86, 0x7F, 0x00, 0xFF, 0xF8, 0x0F, 0xFC, 0x03, -0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0xFF, 0x7B, 0x00, 0xC0, 0x7F, 0xE0, 0x1F, -0xDF, 0xF0, 0x0F, 0xE0, 0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, -0x01, 0xFC, 0x07, 0xFE, 0xFE, 0x0D, 0xFF, 0x00, 0x00, 0xF0, 0xFF, 0x3D, -0x0F, 0xE0, 0x3F, 0xF0, 0xF0, 0x6F, 0xF8, 0x07, 0x3F, 0x80, 0xFF, 0xC0, -0xC0, 0xBF, 0xE1, 0x1F, 0xFF, 0x00, 0xFE, 0x03, 0x00, 0xFF, 0x86, 0x7F, -0x1E, 0x00, 0xF8, 0xFF, 0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, -0xE0, 0x1F, 0xC0, 0x7F, 0x0F, 0xE0, 0xDF, 0xF0, 0x81, 0x7F, 0x00, 0xFF, -0x3F, 0x80, 0x7F, 0xC3, 0x7F, 0x0F, 0x00, 0xFC, 0x0F, 0xFC, 0x03, 0xF8, -0xFE, 0x01, 0xFC, 0x1B, 0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, -0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF, 0xFE, 0xBF, 0x07, 0x00, -0xFC, 0x07, 0xFE, 0x01, 0x0D, 0xFF, 0x00, 0xFE, 0xF0, 0x1F, 0xF8, 0x07, -0x37, 0xFC, 0x03, 0xF8, 0xC0, 0x7F, 0xE0, 0x1F, 0xDF, 0xF0, 0x0F, 0xE0, -0x00, 0xFF, 0xDF, 0x03, 0x00, 0xFE, 0x03, 0xFF, 0xFF, 0x86, 0x7F, 0x00, -0x03, 0xF8, 0x0F, 0xFC, 0xFC, 0x1B, 0xFE, 0x01, 0x0F, 0xE0, 0x3F, 0xF0, -0xF0, 0x6F, 0xF8, 0x07, 0x01, 0x80, 0xFF, 0xEF, 0x7F, 0x00, 0xFF, 0x81, -0x80, 0x7F, 0xC3, 0x3F, 0xFE, 0x01, 0xFC, 0x07, 0x00, 0xFE, 0x0D, 0xFF, -0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xD7, 0x00, 0x40, 0x34, -0xC0, 0x3F, 0x80, 0xFF, 0x1F, 0xC0, 0xBF, 0xE1, 0x03, 0xFF, 0x00, 0xFE, -0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B, -0x9A, 0x6B, 0x00, 0x00, 0x7F, 0xE0, 0x1F, 0xC0, 0xF0, 0x0F, 0xE0, 0xDF, -0xFF, 0x81, 0x7F, 0x00, 0xC3, 0x3F, 0x80, 0x7F, 0xFC, 0x07, 0xFE, 0x01, -0x0D, 0xFF, 0x00, 0xFE, 0xF0, 0xFF, 0x3D, 0x00, 0xE0, 0x3F, 0xF0, 0x0F, -0x6F, 0xF8, 0x07, 0xF0, 0x80, 0xFF, 0xC0, 0x3F, 0xBF, 0xE1, 0x1F, 0xC0, -0x00, 0xFE, 0x03, 0xFF, 0xFF, 0x86, 0x7F, 0x00, 0x00, 0xF8, 0xFF, 0x1E, -0x07, 0xF0, 0x1F, 0xF8, 0xF8, 0x37, 0xFC, 0x03, 0x1F, 0xC0, 0x7F, 0xE0, -0xE0, 0xDF, 0xF0, 0x0F, 0x7F, 0x00, 0xFF, 0x81, 0x80, 0x7F, 0xC3, 0x3F, -0x0F, 0x00, 0xFC, 0x7F, 0xFC, 0x03, 0xF8, 0x0F, 0x01, 0xFC, 0x1B, 0xFE, -0xF0, 0x0F, 0xE0, 0x3F, 0x07, 0xF0, 0x6F, 0xF8, 0xC0, 0x3F, 0x80, 0xFF, -0x1F, 0xC0, 0xBF, 0xE1, 0xBF, 0x07, 0x00, 0xFE, 0x07, 0xFE, 0x01, 0xFC, -0xFF, 0x00, 0xFE, 0x0D, 0x1F, 0xF8, 0x07, 0xF0, 0xFC, 0x03, 0xF8, 0x37, -0x7F, 0xE0, 0x1F, 0xC0, 0xF0, 0x0F, 0xE0, 0xDF, 0xFF, 0xDF, 0x03, 0x00, -0xFE, 0x03, 0xFF, 0x00, 0x86, 0x7F, 0x00, 0xFF, 0xF8, 0x0F, 0xFC, 0x03, -0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0x3F, 0xF0, 0x0F, 0x6F, 0xF8, 0x07, 0xF0, -0x80, 0xFF, 0xEF, 0x01, 0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, -0x01, 0xFC, 0x07, 0xFE, 0xFE, 0x0D, 0xFF, 0x00, 0x07, 0xF0, 0x1F, 0xF8, -0xF8, 0x37, 0xFC, 0x03, 0x00, 0xC0, 0xFF, 0xF7, 0x3F, 0x80, 0xFF, 0xC0, -0xC0, 0xBF, 0xE1, 0x1F, 0xFF, 0x00, 0xFE, 0x03, 0x00, 0xFF, 0x86, 0x7F, -0xFC, 0x03, 0xF8, 0x0F, 0x01, 0xFC, 0x1B, 0xFE, 0x7B, 0x00, 0xE0, 0xFF, -0xE0, 0x1F, 0xC0, 0x7F, 0x0F, 0xE0, 0xDF, 0xF0, 0x81, 0x7F, 0x00, 0xFF, -0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC, 0xFF, 0x00, 0xFE, 0x0D, -0xFF, 0x3D, 0x00, 0xF0, 0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, -0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF, 0xFE, 0x03, 0xFF, 0x00, -0x86, 0x7F, 0x00, 0xFF, 0xF8, 0xFF, 0x1E, 0x00, 0xF0, 0x1F, 0xF8, 0x07, -0x37, 0xFC, 0x03, 0xF8, 0xC0, 0x7F, 0xE0, 0x1F, 0xDF, 0xF0, 0x0F, 0xE0, -0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, 0x00, 0xFC, 0x7F, 0x0F, -0x03, 0xF8, 0x0F, 0xFC, 0xFC, 0x1B, 0xFE, 0x01, 0x0F, 0xE0, 0x3F, 0xF0, -0xF0, 0x6F, 0xF8, 0x07, 0x3F, 0x80, 0xFF, 0xC0, 0xC0, 0xBF, 0xE1, 0x1F, -0x07, 0x00, 0xFE, 0xBF, 0xFE, 0x01, 0xFC, 0x07, 0x00, 0xFE, 0x0D, 0xFF, -0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xE0, 0x1F, 0xC0, 0x7F, -0x0F, 0xE0, 0xDF, 0xF0, 0xDF, 0x03, 0x00, 0xFF, 0x03, 0xFF, 0x00, 0xFE, -0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B, -0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, 0xFF, 0xEF, 0x01, 0x80, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000035.h b/src/cpu/amd/model_10xxx/mc_patch_01000035.h deleted file mode 100644 index 5081bfaa0e..0000000000 --- a/src/cpu/amd/model_10xxx/mc_patch_01000035.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - ============================================================ - (c) Advanced Micro Devices, Inc., 2004-2005 - - The enclosed microcode is intended to be used with AMD - Microprocessors. You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x07, 0x20, 0x23, 0x07, 0x35, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0xDE, 0x76, 0xD5, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x22, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x70, 0x09, 0x00, 0x00, -0x49, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xC1, 0x08, 0x00, 0x00, -0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0xFF, 0xFF, 0x29, 0xC3, 0x5F, 0xD0, 0xC1, -0xBD, 0xFF, 0xFF, 0xB3, 0x0F, 0xFF, 0x7E, 0xFD, 0xF6, 0x1F, 0xF8, 0x57, -0x3C, 0xBC, 0x63, 0x2D, 0x80, 0x96, 0xD6, 0x00, 0xAA, 0xFF, 0xEF, 0xAF, -0xE0, 0xD1, 0x9F, 0x15, 0x57, 0xEF, 0xFF, 0xFF, 0xEA, 0x87, 0x7F, 0xBF, -0x03, 0xFA, 0x0F, 0xFC, 0xFC, 0x1F, 0xBE, 0xF5, 0x00, 0xE0, 0x4A, 0x4B, -0x7F, 0xC8, 0xFF, 0xF7, 0xB4, 0xF8, 0xF0, 0x2F, 0xFF, 0x1F, 0xC5, 0xFE, -0xC0, 0xCF, 0xC3, 0x3F, 0xFF, 0x03, 0xD4, 0xFF, 0x40, 0xC8, 0x0F, 0xEF, -0x3D, 0x00, 0xF0, 0xFF, 0xFB, 0xAF, 0xE5, 0xBF, 0xD7, 0xFA, 0x3F, 0xF8, -0xEB, 0x3F, 0x97, 0xFF, 0x9F, 0xEB, 0xFF, 0xE0, 0x97, 0xFF, 0x5E, 0xFE, -0x7F, 0xAE, 0xFA, 0x83, 0xC9, 0x1A, 0x00, 0x08, 0x9F, 0xFC, 0x07, 0xF0, -0x7C, 0x7B, 0xD9, 0x1F, 0x7F, 0xE0, 0x1F, 0xC0, 0xF0, 0x0F, 0xE0, 0xDF, -0xFF, 0x81, 0x7F, 0x00, 0xC3, 0x3F, 0x80, 0x7F, 0xFC, 0x7F, 0x0F, 0x00, -0xF8, 0x0F, 0xFC, 0x03, 0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0x3F, 0xF0, 0x0F, -0x6F, 0xF8, 0x07, 0xF0, 0x80, 0xFF, 0xC0, 0x3F, 0xBF, 0xE1, 0x1F, 0xC0, -0x00, 0xFE, 0xBF, 0x07, 0x01, 0xFC, 0x67, 0xEB, 0x00, 0x07, 0xFE, 0xDE, -0xFF, 0x02, 0x00, 0xE0, 0xFD, 0x3F, 0xBC, 0x63, 0xFF, 0x8B, 0xFF, 0xFF, -0xF5, 0x7F, 0xF0, 0xEF, 0x03, 0x00, 0x3D, 0x57, 0xFF, 0x58, 0xFE, 0xBF, -0xAC, 0x7C, 0x83, 0x3F, 0xFF, 0x7F, 0xF9, 0xE2, 0x01, 0x7E, 0x1E, 0xFE, -0x1B, 0x0F, 0xE0, 0xBF, 0xF7, 0xF6, 0x3A, 0xF0, 0xAF, 0x01, 0x80, 0xB4, -0x81, 0x7F, 0x00, 0xFF, 0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC, -0xFF, 0x00, 0xFE, 0x0D, 0x1F, 0xF8, 0x07, 0xF0, 0xFC, 0x03, 0xF8, 0x37, -0xFF, 0xF7, 0x00, 0xC0, 0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF, -0xFE, 0x03, 0xFF, 0x00, 0x86, 0x7F, 0x00, 0xFF, 0xF8, 0x0F, 0xFC, 0x03, -0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0xFF, 0x7B, 0x00, 0xC0, 0x7F, 0xE0, 0x1F, -0xDF, 0xF0, 0x0F, 0xE0, 0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, -0x01, 0xFC, 0x07, 0xFE, 0xFE, 0x0D, 0xFF, 0x00, 0x00, 0xF0, 0xFF, 0x3D, -0x0F, 0xE0, 0x3F, 0xF0, 0xF0, 0x6F, 0xF8, 0x07, 0x3F, 0x80, 0xFF, 0xC0, -0xC0, 0xBF, 0xE1, 0x1F, 0xFF, 0x00, 0xFE, 0x03, 0x00, 0xFF, 0x86, 0x7F, -0x1E, 0x00, 0xF8, 0xFF, 0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, -0xE0, 0x1F, 0xC0, 0x7F, 0x0F, 0xE0, 0xDF, 0xF0, 0x81, 0x7F, 0x00, 0xFF, -0x3F, 0x80, 0x7F, 0xC3, 0x7F, 0x0F, 0x00, 0xFC, 0x0F, 0xFC, 0x03, 0xF8, -0xFE, 0x01, 0xFC, 0x1B, 0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, -0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF, 0xFE, 0xBF, 0x07, 0x00, -0xFC, 0x07, 0xFE, 0x01, 0x0D, 0xFF, 0x00, 0xFE, 0xF0, 0x1F, 0xF8, 0x07, -0x37, 0xFC, 0x03, 0xF8, 0xC0, 0x7F, 0xE0, 0x1F, 0xDF, 0xF0, 0x0F, 0xE0, -0x00, 0xFF, 0xDF, 0x03, 0x00, 0xFE, 0x03, 0xFF, 0xFF, 0x86, 0x7F, 0x00, -0x03, 0xF8, 0x0F, 0xFC, 0xFC, 0x1B, 0xFE, 0x01, 0x0F, 0xE0, 0x3F, 0xF0, -0xF0, 0x6F, 0xF8, 0x07, 0x01, 0x80, 0xFF, 0xEF, 0x7F, 0x00, 0xFF, 0x81, -0x80, 0x7F, 0xC3, 0x3F, 0xFE, 0x01, 0xFC, 0x07, 0x00, 0xFE, 0x0D, 0xFF, -0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xD7, 0x00, 0x40, 0x34, -0xC0, 0x3F, 0x80, 0xFF, 0x1F, 0xC0, 0xBF, 0xE1, 0x03, 0xFF, 0x00, 0xFE, -0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B, -0x9A, 0x6B, 0x00, 0x00, 0x7F, 0xE0, 0x1F, 0xC0, 0xF0, 0x0F, 0xE0, 0xDF, -0xFF, 0x81, 0x7F, 0x00, 0xC3, 0x3F, 0x80, 0x7F, 0xFC, 0x07, 0xFE, 0x01, -0x0D, 0xFF, 0x00, 0xFE, 0xF0, 0xFF, 0x3D, 0x00, 0xE0, 0x3F, 0xF0, 0x0F, -0x6F, 0xF8, 0x07, 0xF0, 0x80, 0xFF, 0xC0, 0x3F, 0xBF, 0xE1, 0x1F, 0xC0, -0x00, 0xFE, 0x03, 0xFF, 0xFF, 0x86, 0x7F, 0x00, 0x00, 0xF8, 0xFF, 0x1E, -0x07, 0xF0, 0x1F, 0xF8, 0xF8, 0x37, 0xFC, 0x03, 0x1F, 0xC0, 0x7F, 0xE0, -0xE0, 0xDF, 0xF0, 0x0F, 0x7F, 0x00, 0xFF, 0x81, 0x80, 0x7F, 0xC3, 0x3F, -0x0F, 0x00, 0xFC, 0x7F, 0xFC, 0x03, 0xF8, 0x0F, 0x01, 0xFC, 0x1B, 0xFE, -0xF0, 0x0F, 0xE0, 0x3F, 0x07, 0xF0, 0x6F, 0xF8, 0xC0, 0x3F, 0x80, 0xFF, -0x1F, 0xC0, 0xBF, 0xE1, 0xBF, 0x07, 0x00, 0xFE, 0x07, 0xFE, 0x01, 0xFC, -0xFF, 0x00, 0xFE, 0x0D, 0x1F, 0xF8, 0x07, 0xF0, 0xFC, 0x03, 0xF8, 0x37, -0x7F, 0xE0, 0x1F, 0xC0, 0xF0, 0x0F, 0xE0, 0xDF, 0xFF, 0xDF, 0x03, 0x00, -0xFE, 0x03, 0xFF, 0x00, 0x86, 0x7F, 0x00, 0xFF, 0xF8, 0x0F, 0xFC, 0x03, -0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0x3F, 0xF0, 0x0F, 0x6F, 0xF8, 0x07, 0xF0, -0x80, 0xFF, 0xEF, 0x01, 0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, -0x01, 0xFC, 0x07, 0xFE, 0xFE, 0x0D, 0xFF, 0x00, 0x07, 0xF0, 0x1F, 0xF8, -0xF8, 0x37, 0xFC, 0x03, 0x00, 0xC0, 0xFF, 0xF7, 0x3F, 0x80, 0xFF, 0xC0, -0xC0, 0xBF, 0xE1, 0x1F, 0xFF, 0x00, 0xFE, 0x03, 0x00, 0xFF, 0x86, 0x7F, -0xFC, 0x03, 0xF8, 0x0F, 0x01, 0xFC, 0x1B, 0xFE, 0x7B, 0x00, 0xE0, 0xFF, -0xE0, 0x1F, 0xC0, 0x7F, 0x0F, 0xE0, 0xDF, 0xF0, 0x81, 0x7F, 0x00, 0xFF, -0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC, 0xFF, 0x00, 0xFE, 0x0D, -0xFF, 0x3D, 0x00, 0xF0, 0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, -0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF, 0xFE, 0x03, 0xFF, 0x00, -0x86, 0x7F, 0x00, 0xFF, 0xF8, 0xFF, 0x1E, 0x00, 0xF0, 0x1F, 0xF8, 0x07, -0x37, 0xFC, 0x03, 0xF8, 0xC0, 0x7F, 0xE0, 0x1F, 0xDF, 0xF0, 0x0F, 0xE0, -0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, 0x00, 0xFC, 0x7F, 0x0F, -0x03, 0xF8, 0x0F, 0xFC, 0xFC, 0x1B, 0xFE, 0x01, 0x0F, 0xE0, 0x3F, 0xF0, -0xF0, 0x6F, 0xF8, 0x07, 0x3F, 0x80, 0xFF, 0xC0, 0xC0, 0xBF, 0xE1, 0x1F, -0x07, 0x00, 0xFE, 0xBF, 0xFE, 0x01, 0xFC, 0x07, 0x00, 0xFE, 0x0D, 0xFF, -0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xE0, 0x1F, 0xC0, 0x7F, -0x0F, 0xE0, 0xDF, 0xF0, 0xDF, 0x03, 0x00, 0xFF, 0x03, 0xFF, 0x00, 0xFE, -0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B, -0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, 0xFF, 0xEF, 0x01, 0x80, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - diff --git a/src/cpu/amd/model_10xxx/pstate.c b/src/cpu/amd/model_10xxx/pstate.c deleted file mode 100644 index 240f47e4b2..0000000000 --- a/src/cpu/amd/model_10xxx/pstate.c +++ /dev/null @@ -1,456 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "../../../northbridge/amd/amdfam10/amdfam10.h" - -#include -#include -#include -#include -#include - -#include - -#include -#include - -extern device_t get_node_pci(u32 nodeid, u32 fn); - -#include "fidvid_common.c" - -#define PSTATES_DEBUG 0 - - - -static void inline dump_msr_pstates(u32 nodes) -{ -#if PSTATES_DEBUG==1 - int i, j; - for(j=0; j<5; j++) { - printk_debug("P%d:", j); - for(i=0;i>8)&3) { - case 0: times = 1000; break; - case 1: times = 100; break; - case 2: times = 10; break; - default: - //error - times = 1; - } - - return (val & 0xff) * times; - -} - - -static u32 get_powerstep(u32 val) -{ - u32 time; - if(val<4) {time = (4 - val)*100;} - else if(val<8) { time = (9+4-val)*10;} - else { time = (10+8-val) * 5; } - - return time; - -} - - -static u32 get_plllocktime(u32 val) -{ - u32 time; - switch(val) { - case 0: - case 1: - case 2: - case 3: - time = val+1; break; - case 4: time = 8; break; - case 5: time = 16; break; - default: - //erro2 - time = 1; - } - return time; -} - - -static void disable_pstate(u32 nodes, u32 *p) -{ - int i; - - for(i=0;i> 31); - if(!enable) { - disable_pstate(nodes, p); - return; - } - corecof_min = ((sysconf.msr_pstate[0*5+p[0]].lo & 0x3f) + 0x10)>>((sysconf.msr_pstate[0*5+p[0]].lo>>6) & 7); - pwrval_max = sysconf.msr_pstate[0*5+p[0]].hi & 0x3ff; - pwrvalue_max = get_pwrvalue(pwrval_max); - - for(i=1; i> 31); - if(!enable) { - disable_pstate(nodes, p); - return; - } - - u32 coredid = ((sysconf.msr_pstate[i*5+p[i]].lo>>6) & 7); - u32 corecof = ((sysconf.msr_pstate[i*5+p[i]].lo & 0x3f) + 0x10)>>coredid; - if(corecofpwrvalue_max) { - pwrvalue_max = pwrvalue; - pwrval_max = pwrval; - } - } - - for(i=0; i>6) & 7); - u32 corefid = (corecof_min<>7) & 0x3f; - for(j=0; j<5; j++) { - val = pci_read_config32(f4_dev[i], 0x1e0 + (j<<2)); - nbdid = ((val>>16) & 1); - sysconf.msr_pstate[i*5+j].lo = (val & 0xffff) | (nbdid<<22) | ((nbdid?nbvid1:nbvid0)<<25); - sysconf.msr_pstate[i*5+j].hi = (((val>>17) & 0x3ff) << (32-32)) | (((val>>27) & 1)<<(63-32)); - } - } - - dump_msr_pstates(nodes); - - sysconf.needs_update_pstate_msrs = 0; // normal case for all sockets are installed same conf CPU - - for(i=1; (i>28) & 7)); - if(p_htc[i] == 0) { - val |= 1<<28; - pci_write_config32(f3_dev[i], 0x64, val); - val = pci_read_config32(f3_dev[i], 0x68); //stc - val &= ~(7<<28); - val |= (1<<28); - pci_write_config32(f3_dev[i], 0x68, val); - - p_htc[i] = 1; - } - } - if(htc_cap) { - match_pstate(nodes, p_htc); - - dump_p("P_htc\n", nodes, p_htc); - dump_msr_pstates(nodes); - } - - //p_lowest - for(i=0;i((val>>8) & 7)) { - val &= ~(7<<8); - val |= (p_lowest[i])<<8; - pci_write_config32(f3_dev[i], 0xdc, val); - } - else { - p_lowest[i] = (val>>8) & 7; - } - } - if(htc_cap) { - for(i=0;ihi & (1<<(63-32)) )) continue; - if((msr_pstate->lo & 0x3f) != corefid) { - corefid_equal = 0; - break; - } - } - for(j=0; j<5; j++) { - struct p_state_t *p_state; - msr_t *msr_pstate; - msr_pstate = &sysconf.msr_pstate[i*5+j]; - if(!(msr_pstate->hi & (1<<(63-32)) )) continue; - p_state = &sysconf.p_state[i*5+sysconf.p_state_num]; - u32 coredid = ((msr_pstate->lo>>6) & 7); - u32 corecof = ((msr_pstate->lo & 0x3f) + 0x10)>>coredid; - p_state->corefreq = corecof; - - u32 pwrval, pwrvalue; - pwrval = msr_pstate->hi & 0x3ff; - pwrvalue = get_pwrvalue(pwrval); - p_state->power = pwrvalue; - - u32 lat; - val = pci_read_config32(f3_dev[i], 0xd4); - lat = 15 * (get_powerstep((val>>24)& 0xf)+get_powerstep((val>>20)& 0xf)) /1000; - if(!corefid_equal) { - val = pci_read_config32(f3_dev[i], 0xa0); - lat += get_plllocktime((val >> 11 ) & 7); - } - p_state->transition_lat = lat; - p_state->busmaster_lat = lat; - - p_state->control = j; - p_state->status = j; - - sysconf.p_state_num++; - } - // don't need look at other nodes - if(!sysconf.p_state_num) break; - } -} - - -//it will update pstates info from ram into MSR -void init_pstates(device_t dev, u32 nodeid, u32 coreid) -{ - int j; - msr_t msr; - - if(sysconf.needs_update_pstate_msrs) { - for(j=0; j < 5; j++) { - wrmsr(0xC0010064 + j, sysconf.msr_pstate[nodeid * 5 + j]); - } - } - - /* Set TSC Freq Select: TSC increments at the rate of the core P-state 0 */ - msr = rdmsr(0xC0010015); - msr.lo |= 1 << 24; - wrmsr(0xC0010015, msr); - - // Enter the state P0 - //FIXME I don't think that this works correctly. May depend on early fid/vid setup. - if(sysconf.p_state_num) - set_core_nb_max_pstate_after_other_warm_reset(nodeid, coreid); - -} -- cgit v1.2.3