From 4ee82c69a2ecfe1afc9a357fc7ddbaa06c10d2b5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 25 Nov 2014 16:03:12 +0200 Subject: AGESA fam16kb: Move clearing of NoSnoopEnable bit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Originally from commit 4ca72139 move this code now from cpu/ to northbridge/. Change-Id: I38517cff273dd8f78bf5eda1d48fd1cd820ced88 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/7603 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/cpu/amd/agesa/amd_late_init.c | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'src/cpu/amd') diff --git a/src/cpu/amd/agesa/amd_late_init.c b/src/cpu/amd/agesa/amd_late_init.c index a0a3516835..26442f4913 100644 --- a/src/cpu/amd/agesa/amd_late_init.c +++ b/src/cpu/amd/agesa/amd_late_init.c @@ -19,10 +19,6 @@ #include #include -#include -#include -#include -#include #include #include @@ -38,20 +34,6 @@ static void agesawrapper_post_device(void *unused) AGESAWRAPPER(amdinitlate); -#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY_16KB) - device_t dev; - u32 value; - dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */ - pci_write_config32(dev, 0xF8, 0); - pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */ - - /* disable No Snoop */ - dev = dev_find_slot(0, PCI_DEVFN(1, 1)); - value = pci_read_config32(dev, 0x60); - value &= ~(1 << 11); - pci_write_config32(dev, 0x60, value); -#endif - #if CONFIG_AMD_SB_CIMX sb_Late_Post(); #endif -- cgit v1.2.3