From 8b95c134207de9573f8e5eb758e5cee51741604a Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 7 Jul 2013 11:30:48 +0300 Subject: AMD: Kconfig cleanup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ie347b32575c26133d52c275622d29d1cd4c6c0c7 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/3623 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/amd/socket_C32/Kconfig | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'src/cpu/amd/socket_C32') diff --git a/src/cpu/amd/socket_C32/Kconfig b/src/cpu/amd/socket_C32/Kconfig index f8e441f1e7..97b37ee814 100644 --- a/src/cpu/amd/socket_C32/Kconfig +++ b/src/cpu/amd/socket_C32/Kconfig @@ -6,33 +6,30 @@ config CPU_AMD_SOCKET_C32_NON_AGESA select CACHE_AS_RAM select X86_AMD_FIXED_MTRRS +if CPU_AMD_SOCKET_C32_NON_AGESA + config CPU_SOCKET_TYPE hex default 0x14 - depends on CPU_AMD_SOCKET_C32_NON_AGESA config EXT_RT_TBL_SUPPORT bool default n - depends on CPU_AMD_SOCKET_C32_NON_AGESA config EXT_CONF_SUPPORT bool default n - depends on CPU_AMD_SOCKET_C32_NON_AGESA config CBB hex default 0x0 - depends on CPU_AMD_SOCKET_C32_NON_AGESA config CDB hex default 0x18 - depends on CPU_AMD_SOCKET_C32_NON_AGESA config XIP_ROM_SIZE hex default 0x80000 - depends on CPU_AMD_SOCKET_C32_NON_AGESA +endif -- cgit v1.2.3